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-rw-r--r--src/priv-preface.tex42
-rw-r--r--src/riscv-privileged.tex4
2 files changed, 40 insertions, 6 deletions
diff --git a/src/priv-preface.tex b/src/priv-preface.tex
index 80d61b2..1ed7b39 100644
--- a/src/priv-preface.tex
+++ b/src/priv-preface.tex
@@ -1,9 +1,43 @@
\chapter{Preface}
-This document describes the RISC-V privileged architecture. This
-release, version \privrev, represents the ratified 1.11 version of the
-machine and supervisor ISA modules.
+This is {\bf a draft of} version 1.12 of the RISC-V privileged
+architecture proposal.
+The document contains the following versions of the RISC-V ISA
+modules:
+
+{
+\begin{table}[hbt]
+ \centering
+ \begin{tabular}{|c|l|c|}
+ \hline
+ Module & Version & Status\\
+ \hline
+ \em Machine ISA & \em 1.12 & \em Draft \\
+ \em Supervisor ISA & \em 1.12 & \em Draft \\
+ \em Hypervisor ISA & \em 0.4 & \em Draft \\
+ \hline
+ \end{tabular}
+\end{table}
+}
+
+The Machine and Supervisor ISAs, version 1.11, have been ratified by
+the RISC-V Foundation. Version 1.12 of these modules, described in
+this document, is backwards compatible with version 1.11.
+
+Changes from version 1.11 include:
+\vspace{-0.2in}
+\begin{itemize}
+ \parskip 0pt
+ \itemsep 1pt
+\item A revised hypervisor architecture proposal that represents VS-mode
+ CSR state more simply.
+\end{itemize}
+
+\newpage
+
+\section*{Preface to Version 1.11}
+This is version 1.11 of the RISC-V privileged architecture.
The document contains the following versions of the RISC-V ISA
modules:
@@ -22,7 +56,7 @@ modules:
\end{table}
}
-The changes in this version of the document include:
+Changes from version 1.10 include:
\vspace{-0.2in}
\begin{itemize}
\parskip 0pt
diff --git a/src/riscv-privileged.tex b/src/riscv-privileged.tex
index 3bba08a..0481bdd 100644
--- a/src/riscv-privileged.tex
+++ b/src/riscv-privileged.tex
@@ -10,8 +10,8 @@
\input{preamble}
-\newcommand{\privrev}{\mbox{20190608-Priv-MSU-Ratified}}
-\newcommand{\privmonthyear}{\mbox{June 2019}}
+\newcommand{\privrev}{1.12-draft}
+\newcommand{\privmonthyear}{June 2019}
\setcounter{secnumdepth}{3}
\setcounter{tocdepth}{3}