Fixed double quotes and added missing admonitions.

Fixed the double quotes that didn't convert correctly.
Added in several missing Notes admonitions.

1 files changed, 22 insertions, 13 deletions

diff --git a/src/zfinx.adoc b/src/zfinx.adoc
index d74d55e..f46fe9c 100644
--- a/src/zfinx.adoc
+++ b/src/zfinx.adoc
@@ -1,15 +1,17 @@
 [[sec:zfinx]]
-== ''Zfinx'', ''Zdinx'', ''Zhinx'', ''Zhinxmin'': Standard Extensions for Floating-Point in Integer Registers, Version 1.0
+== "Zfinx", "Zdinx", "Zhinx", "Zhinxmin": Standard Extensions for Floating-Point in Integer Registers, Version 1.0
 
-This chapter defines the ''Zfinx'' extension (pronounced ''z-f-in-x'')
+This chapter defines the "Zfinx" extension (pronounced "z-f-in-x")
 that provides instructions similar to those in the standard
 floating-point F extension for single-precision floating-point
 instructions but which operate on the `x` registers instead of the `f`
-registers. This chapter also defines the ''Zdinx'', ``Zhinx'', and
-''Zhinxmin'' extensions that provide similar instructions for other
+registers. This chapter also defines the "Zdinx", "Zhinx", and
+"Zhinxmin" extensions that provide similar instructions for other
 floating-point precisions.
 
-The F extension uses separate `f` registers for floating-point
+[NOTE]
+====
+_The F extension uses separate `f` registers for floating-point
 computation, to reduce register pressure and simplify the provision of
 register-file ports for wide superscalars. However, the additional of
 architectural state increases the minimal implementation cost. By
@@ -19,16 +21,19 @@ instruction-set support. Zfinx also reduces context-switch cost.
 
 In general, software that assumes the presence of the F extension is
 incompatible with software that assumes the presence of the Zfinx
-extension, and vice versa.
+extension, and vice versa._
+====
 
 The Zfinx extension adds all of the instructions that the F extension
 adds, _except_ for the transfer instructions FLW, FSW, FMV.W.X, FMV.X.W,
 C.FLW[SP], and C.FSW[SP].
 
-Zfinx software uses integer loads and stores to transfer floating-point
+[NOTE]
+====
+_Zfinx software uses integer loads and stores to transfer floating-point
 values from and to memory. Transfers between registers use either
-integer arithmetic or floating-point sign-injection instructions.
-
+integer arithmetic or floating-point sign-injection instructions._
+====
 The Zfinx variants of these F-extension instructions have the same
 semantics, except that whenever such an instruction would have accessed
 an `f` register, it instead accesses the `x` register with the same
@@ -43,6 +48,8 @@ operands ignore operand bits XLEN-1:_w_.
 Floating-point operations that produce _w_ latexmath:[$<$] XLEN-bit
 results fill bits XLEN-1:_w_ with copies of bit _w_-1 (the sign bit).
 
+[NOTE]
+====
 The NaN-boxing scheme employed in the `f` registers was designed to
 efficiently support recoded floating-point formats. Recoding is less
 practical for Zfinx, though, since the same registers hold both
@@ -54,7 +61,7 @@ registers matches the existing RV64 calling conventions, which require
 all 32-bit types to be sign-extended when passed or returned in `x`
 registers. To keep the architecture more regular, we extend this pattern
 to 16-bit floating-point numbers in both RV32 and RV64.
-
+====
 === Zdinx
 
 The Zdinx extension provides analogous double-precision floating-point
@@ -89,11 +96,13 @@ result to `x0` does not cause `x1` to be written.
 When `x0` is used as a double-width floating-point operand, the entire
 operand is zero—i.e., `x1` is not accessed.
 
-Load-pair and store-pair instructions are not provided, so transferring
+[NOTE]
+====
+_Load-pair and store-pair instructions are not provided, so transferring
 double-precision operands in RV32Zdinx from or to memory requires two
 loads or stores. Register moves need only a single FSGNJ.D instruction,
-however.
-
+however._
+====
 === Zhinx
 
 The Zhinx extension provides analogous half-precision floating-point