Fix xref text

Adding alternate text for xrefs

1 files changed, 6 insertions, 6 deletions

diff --git a/src/zc.adoc b/src/zc.adoc
index 8221860..e217797 100644
--- a/src/zc.adoc
+++ b/src/zc.adoc
@@ -63,7 +63,7 @@ As C defines the same instructions as Zca, Zcf and Zcd, the rule is that:
 * C+F implies Zcf (RV32 only)
 * C+D implies Zcd
 
-[#Zce]
+[reftext="Zce"]
 === Zce
 
 The Zce extension is intended to be used for microcontrollers, and includes all relevant Zc extensions.
@@ -90,7 +90,7 @@ MISA.C is set if the following extensions are selected:
 * Zca, Zcd if D is specified (RV64 only)
 ** this configuration excludes Zcmp, Zcmt
 
-[#Zca,Zca]
+[reftext="Zca"]
 === Zca
 
 The Zca extension is added as way to refer to instructions in the C extension that do not include the floating-point loads and stores.
@@ -102,7 +102,7 @@ Therefore it _excluded_ all 16-bit floating point loads and stores: _c.flw_, _c.
 the C extension only includes F/D instructions when D and F are also specified
 ====
 
-[#Zcf]
+[reftext="Zcf"]
 === Zcf (RV32 only)
 
 Zcf is the existing set of compressed single precision floating point loads and stores: _c.flw_, _c.flwsp_, _c.fsw_, _c.fswsp_.
@@ -111,14 +111,14 @@ Zcf is only relevant to RV32, it cannot be specified for RV64.
 
 The Zcf extension depends on the <<Zca>> and F extensions.
 
-[#Zcd]
+[reftext="Zcd"]
 === Zcd 
 
 Zcd is the existing set of compressed double precision floating point loads and stores: _c.fld_, _c.fldsp_, _c.fsd_, _c.fsdsp_.
 
 The Zcd extension depends on the <<Zca>> and D extensions.
 
-[#Zcb]
+[reftext="Zcb"]
 === Zcb
 
 Zcb has simple code-size saving instructions which are easy to implement on all CPUs.
@@ -1304,7 +1304,7 @@ addi sp, sp, 32
 ret
 ----
 
-[[pushpop_non-idem-mem]]
+[[pushpop_non-idem-mem,Non-idempotent memory handling]]
 ==== Non-idempotent memory handling
 
 An implementation may have a requirement to issue a PUSH/POP instruction to non-idempotent memory.