Setting up the inclusion of Vector.

Added Vector and all supporting files.

1 files changed, 11 insertions, 11 deletions

diff --git a/src/v-st-ext.adoc b/src/v-st-ext.adoc
index e52bc59..619492b 100644
--- a/src/v-st-ext.adoc
+++ b/src/v-st-ext.adoc
@@ -165,7 +165,7 @@ The `vtype` register has five fields, `vill`, `vma`, `vta`,
 `vsew[2:0]`, and `vlmul[2:0]`.  Bits `vtype[XLEN-2:8]` should be
 written with zero, and non-zero values in this field are reserved.
 
-include::vtype-format.adoc[]
+include::images/wavedrom/vtype-format.adoc[]
 
 NOTE: A small implementation supporting ELEN=32 requires only seven
 bits of state in `vtype`: two bits for `ma` and `ta`, two bits for
@@ -887,11 +887,11 @@ floating-point load/store 12-bit immediate field to provide further
 vector instruction encoding, with bit 25 holding the standard vector
 mask bit (see <<sec-vector-mask-encoding>>).
 
-include::vmem-format.adoc[]
+include::images/wavedrom/vmem-format.adoc[]
 
-include::valu-format.adoc[]
+include::images/wavedrom/valu-format.adoc[]
 
-include::vcfg-format.adoc[]
+include::images/wavedrom/vcfg-format.adoc[]
 
 Vector instructions can have scalar or vector source operands and
 produce scalar or vector results, and most vector instructions can be
@@ -1148,11 +1148,11 @@ their arguments, and write the new value of `vl` into `rd`.
  vsetvl  rd, rs1, rs2      # rd = new vl, rs1 = AVL, rs2 = new vtype value
 ----
 
-include::vcfg-format.adoc[]
+include::images/wavedrom/vcfg-format.adoc[]
 
 ==== `vtype` encoding
 
-include::vtype-format.adoc[]
+include::images/wavedrom/vtype-format.adoc[]
 
 The new `vtype` value is encoded in the immediate fields of `vsetvli`
 and `vsetivli`, and in the `rs2` register for `vsetvl`.
@@ -1348,7 +1348,7 @@ floating-point load/store 12-bit immediate field to provide further
 vector instruction encoding, with bit 25 holding the standard vector
 mask bit (see <<sec-vector-mask-encoding>>).
 
-include::vmem-format.adoc[]
+include::images/wavedrom/vmem-format.adoc[]
 
 [cols="4,12"]
 |===
@@ -2173,7 +2173,7 @@ The vector arithmetic instructions use a new major opcode (OP-V =
 1010111~2~) which neighbors OP-FP.  The three-bit `funct3` field is
 used to define sub-categories of vector instructions.
 
-include::valu-format.adoc[]
+include::images/wavedrom/valu-format.adoc[]
 
 [[sec-arithmetic-encoding]]
 ==== Vector Arithmetic Instruction encoding
@@ -3461,7 +3461,7 @@ The following table gives the seven MSBs of the output significand as a
 function of the LSB of the normalized input exponent and the six MSBs of the
 normalized input significand; the other bits of the output significand are zero.
 
-include::vfrsqrt7.adoc[]
+include::images/wavedrom/vfrsqrt7.adoc[]
 
 NOTE: For example, when SEW=32, vfrsqrt7(0x00718abc ({approx} 1.043e-38)) = 0x5f080000 ({approx} 9.800e18), and vfrsqrt7(0x7f765432 ({approx} 3.274e38)) = 0x1f820000 ({approx} 5.506e-20).
 
@@ -3548,7 +3548,7 @@ The following table gives the seven MSBs of the normalized output significand
 as a function of the seven MSBs of the normalized input significand; the other
 bits of the normalized output significand are zero.
 
-include::vfrec7.adoc[]
+include::images/wavedrom/vfrec7.adoc[]
 
 If the normalized output exponent is 0 or -1, the result is subnormal: the
 output exponent is 0, and the output significand is given by concatenating
@@ -5173,5 +5173,5 @@ computation in single-precision will suffice.
 
 === Vector Instruction Listing
 
-include::inst-table.adoc[]
+include::images/wavedrom/inst-table.adoc[]