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| author | Daniel Lustig <dlustig@nvidia.com> | 2020-07-30 19:48:30 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-07-30 16:48:30 -0700 |
| commit | df309b61460e91ff1cdc8340719d51bd9d6dfb6e (patch) | |
| tree | 722d300713c1d2efe58d636bb51fd18cec4fa3ea /src/supervisor.tex | |
| parent | 8088ba478136a25e864a34c5467941c68f104509 (diff) | |
| download | riscv-isa-manual-df309b61460e91ff1cdc8340719d51bd9d6dfb6e.zip riscv-isa-manual-df309b61460e91ff1cdc8340719d51bd9d6dfb6e.tar.gz riscv-isa-manual-df309b61460e91ff1cdc8340719d51bd9d6dfb6e.tar.bz2 | |
Fix Sv48 VALEN typo (#551)
Diffstat (limited to 'src/supervisor.tex')
| -rw-r--r-- | src/supervisor.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex index fa0fe9b..85af32d 100644 --- a/src/supervisor.tex +++ b/src/supervisor.tex @@ -1772,5 +1772,5 @@ A page-fault exception is raised if the physical address is insufficiently aligned. The algorithm for virtual-to-physical address translation is the same as in -Section~\ref{sv32algorithm}, except VALEN equals 39, LEVELS equals 4, and +Section~\ref{sv32algorithm}, except VALEN equals 48, LEVELS equals 4, and PTESIZE equals 8. |