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| author | Ved Shanbhogue <ved@rivosinc.com> | 2024-04-11 09:06:12 -0500 |
|---|---|---|
| committer | Ved Shanbhogue <ved@rivosinc.com> | 2024-04-11 09:06:12 -0500 |
| commit | 1c4bef91d5414f80db965a3d76d11a2a7e90961a (patch) | |
| tree | 5206b587a879a8230c46681a8de9488bc6e174f9 /src/smstateen.adoc | |
| parent | 382fd8bd3e83105582057f494983424c5d9b6526 (diff) | |
| download | riscv-isa-manual-1c4bef91d5414f80db965a3d76d11a2a7e90961a.zip riscv-isa-manual-1c4bef91d5414f80db965a3d76d11a2a7e90961a.tar.gz riscv-isa-manual-1c4bef91d5414f80db965a3d76d11a2a7e90961a.tar.bz2 | |
use lower case for jvt CSR
Diffstat (limited to 'src/smstateen.adoc')
| -rw-r--r-- | src/smstateen.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/smstateen.adoc b/src/smstateen.adoc index f0fdea0..e037720 100644 --- a/src/smstateen.adoc +++ b/src/smstateen.adoc @@ -247,7 +247,7 @@ floating-point instructions cause an illegal instruction trap (or virtual instruction trap, if relevant), as though they all access `fcsr`, regardless of whether they really do. -The JVT bit controls access to the `JVT` CSR provided by the Zcmt extension. +The JVT bit controls access to the `jvt` CSR provided by the Zcmt extension. The SE0 bit in `mstateen0` controls access to the `hstateen0`, `hstateen0h`, and the `sstateen0` CSRs. The SE0 bit in `hstateen0` controls access to the |