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authorBill Traynor <wmat@riscv.org>2023-01-04 23:10:50 -0500
committerBill Traynor <wmat@riscv.org>2023-01-04 23:10:50 -0500
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Formatting to match LaTeX.
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diff --git a/src/rvwmo.adoc b/src/rvwmo.adoc
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--- a/src/rvwmo.adoc
+++ b/src/rvwmo.adoc
@@ -3,7 +3,7 @@
This chapter defines the RISC-V memory consistency model. A memory
consistency model is a set of rules specifying the values that can be
-returned by loads of memory. RISC-V uses a memory model called RVWMO
+returned by loads of memory. RISC-V uses a memory model called "RVWMO"
(RISC-V Weak Memory Ordering) which is designed to provide flexibility
for architects to build high-performance scalable designs while
simultaneously supporting a tractable programming model.
@@ -17,14 +17,12 @@ instructions from the first hart being executed in a different order.
Therefore, multithreaded code may require explicit synchronization to
guarantee ordering between memory instructions from different harts. The
base RISC-V ISA provides a FENCE instruction for this purpose, described
-in <<fence>>, while the atomics extension _A_
-additionally defines load-reserved/store-conditional and atomic
-read-modify-write instructions.
+in <<fence>>, while the atomics extension "A" additionally defines load-reserved/store-conditional and atomic read-modify-write instructions.
(((atomics, misaligned)))
-The standard ISA extension for misaligned atomics _Zam_
+The standard ISA extension for misaligned atomics "Zam"
(<<zam>>) and the standard ISA extension for total
-store ordering _Ztso_ (<<ztso>>) augment RVWMO
+store ordering "Ztso" (<<ztso>>) augment RVWMO
with additional rules specific to those extensions.
The appendices to this specification provide both axiomatic and
@@ -58,7 +56,7 @@ The RVWMO memory model is defined in terms of the _global memory order_,
a total ordering of the memory operations produced by all harts. In
general, a multithreaded program has many different possible executions,
with each execution having its own corresponding global memory order.
-((RVWMO))
+(((RVWMO)))
The global memory order is defined over the primitive load and store
operations generated by memory instructions. It is then subject to the
@@ -104,9 +102,9 @@ a set of component memory operations of any granularity. The memory
operations generated by such instructions are not ordered with respect
to each other in program order, but they are ordered normally with
respect to the memory operations generated by preceding and subsequent
-instructions in program order. The atomics extension *A* does not
+instructions in program order. The atomics extension "A" does not
require execution environments to support misaligned atomic instructions
-at all; however, if misaligned atomics are supported via the *Zam*
+at all; however, if misaligned atomics are supported via the "Zam"
extension, LRs, SCs, and AMOs may be decomposed subject to the
constraints of the atomicity axiom for misaligned atomics, which is
defined in <<zam>>.
@@ -130,17 +128,17 @@ whether an SC must succeed, may succeed, or must fail is defined in
<<sec:lrsc>>.
Load and store operations may also carry one or more ordering
-annotations from the following set: _acquire-RCpc_, _acquire-RCsc_,
-_release-RCpc_, and _release-RCsc_. An AMO or LR instruction with
-_aq_ set has an _acquire-RCsc_ annotation. An AMO or SC instruction
-with _rl_ set has a _release-RCsc_ annotation. An AMO, LR, or SC
-instruction with both _aq_ and _rl_ set has both _acquire-RCsc_ and
-_release-RCsc_ annotations.
-
-For convenience, we use the term _acquire annotation_ to refer to an
+annotations from the following set: "acquire-RCpc", "acquire-RCsc",
+"release-RCpc", and "release-RCsc". An AMO or LR instruction with
+_aq_ set has an "acquire-RCsc" annotation. An AMO or SC instruction
+with _rl_ set has a "release-RCsc" annotation. An AMO, LR, or SC
+instruction with both _aq_ and _rl_ set has both "acquire-RCsc" and
+"release-RCsc" annotations.
+
+For convenience, we use the term "acquire annotation" to refer to an
acquire-RCpc annotation or an acquire-RCsc annotation. Likewise, a
-_release annotation_ refers to a release-RCpc annotation or a
-release-RCsc annotation. An _RCpc annotation_ refers to an
+"release annotation" refers to a release-RCpc annotation or a
+release-RCsc annotation. An "RCpc annotation" refers to an
acquire-RCpc annotation or a release-RCpc annotation. An _RCsc
annotation_ refers to an acquire-RCsc annotation or a release-RCsc
annotation.