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authorKrste Asanovic <krste@eecs.berkeley.edu>2018-11-06 14:57:42 -0800
committerKrste Asanovic <krste@eecs.berkeley.edu>2018-11-06 14:57:42 -0800
commitde0f1ed0e786c8b745fadd6dc1c5e899a8d57057 (patch)
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parentefa2a40a2329717142cb975d93c7b3f6ab473295 (diff)
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Moved zifencetso back into main I chapter, as does not extend base ISA spec.
Diffstat (limited to 'src/rv32.tex')
-rw-r--r--src/rv32.tex17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/rv32.tex b/src/rv32.tex
index 54bbaba..b1bcaca 100644
--- a/src/rv32.tex
+++ b/src/rv32.tex
@@ -1158,6 +1158,9 @@ FENCE.
\hline
0000 & \em none & Normal Fence \\
\hline
+\multirow{2}{*}{1000} & \multirow{2}{*}{TSO} & With FENCE RW,RW: exclude write-to-read ordering \\
+ & & Otherwise: \em Reserved for future use. \\
+\hline
\multicolumn{2}{|c|}{\em other} & \em Reserved for future use. \\
\hline
\end{tabular}
@@ -1171,6 +1174,20 @@ The fence mode field {\em fm} defines the semantics of the FENCE. A
FENCE with {\em fm}=0000 orders all memory operations in its
predecessor set before all memory operations in its successor set.
+The optional FENCE.TSO instruction with {\em fm}=1000 orders all load
+operations in its predecessor set before all memory operations in its
+successor set, and all store operations in its predecessor set before
+all store operations in its successor set. This leaves non-AMO store
+operations in the FENCE.TSO's predecessor set unordered with non-AMO
+loads in its successor set.
+
+\begin{commentary}
+ The FENCE.TSO encoding was added as an optional extension to the
+ original base FENCE instruction encoding. The base definition
+ requires that implementations ignore any set bits and treat the
+ FENCE as global, and so this is a backwards-compatible extension.
+\end{commentary}
+
The unused fields in the FENCE instructions---{\em rs1} and {\em rd}---are
reserved for finer-grain fences in future extensions. For forward
compatibility, base implementations shall ignore these fields, and standard