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| author | elisa <elisa@riscv.org> | 2021-10-28 14:25:12 -0700 |
|---|---|---|
| committer | elisa <elisa@riscv.org> | 2021-10-28 14:25:12 -0700 |
| commit | 364c03e71fd206c030d1ffb13b50f91ffd910be4 (patch) | |
| tree | bd84680727581685c68b8389ee44d4dd6833357c /src/rv128.adoc | |
| parent | 3daeab91d68fefef377e204f0bc47018c605aeb0 (diff) | |
| download | riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.zip riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.tar.gz riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.tar.bz2 | |
formatting refinements
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| -rw-r--r-- | src/rv128.adoc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/rv128.adoc b/src/rv128.adoc index 47b4068..2440753 100644 --- a/src/rv128.adoc +++ b/src/rv128.adoc @@ -2,9 +2,9 @@ == RV128I Base Integer Instruction Set, Version 1.7 ==== -_"There is only one mistake that can be made in computer design that is +"There is only one mistake that can be made in computer design that is difficult to recover from—not having enough address bits for memory -addressing and memory management."_ Bell and Strecker, ISCA-3, 1976. +addressing and memory management." Bell and Strecker, ISCA-3, 1976. ==== This chapter describes RV128I, a variant of the RISC-V ISA supporting a |