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author | Bill Traynor <wmat@riscv.org> | 2023-03-10 16:44:01 -0500 |
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committer | Bill Traynor <wmat@riscv.org> | 2023-03-10 16:44:01 -0500 |
commit | eb5e542cc908471718858d5ddc4e58bbc1f70066 (patch) | |
tree | ab5469b0fa1e4ab4d8267d15e3c0007746027a61 /src/rnmi.adoc | |
parent | aea4d112ce6a315e7222015e04206ac8a474599b (diff) | |
download | riscv-isa-manual-eb5e542cc908471718858d5ddc4e58bbc1f70066.zip riscv-isa-manual-eb5e542cc908471718858d5ddc4e58bbc1f70066.tar.gz riscv-isa-manual-eb5e542cc908471718858d5ddc4e58bbc1f70066.tar.bz2 |
Added mncause diag
Added mncause bytefield-svg diagram
Diffstat (limited to 'src/rnmi.adoc')
-rw-r--r-- | src/rnmi.adoc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/rnmi.adoc b/src/rnmi.adoc index 2d2ea2b..fe8cd21 100644 --- a/src/rnmi.adoc +++ b/src/rnmi.adoc @@ -75,9 +75,8 @@ The `mncause` CSR holds the reason for the NMI, with bit MXLEN-1 set to 1, and the NMI cause encoded in the least-significant bits or zero if NMI causes are not supported. -TRFcFcF & & & & & & + -& & & & & & + -MXLEN-13 & 2 & 3 & 1 & 3 & 1 & 3 + +.Resumable NMI status register `mnstatus`. +include::images/bytefield/mnstatus.adoc[] The `mnstatus` CSR holds a two-bit field, MNPP, which on entry to the trap handler holds the privilege mode of the interrupted context, |