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| author | Bill Traynor <wmat@riscv.org> | 2023-04-03 15:28:46 -0400 |
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| committer | Bill Traynor <wmat@riscv.org> | 2023-04-03 15:28:46 -0400 |
| commit | 934552c832a70206dd026a3d54aee543d902ef4b (patch) | |
| tree | 042658acf81401ef5fcff5523c6d4b6c565574eb /src/rnmi.adoc | |
| parent | efb2fd4e154780e764171271a1c5410188486b2f (diff) | |
| download | riscv-isa-manual-934552c832a70206dd026a3d54aee543d902ef4b.zip riscv-isa-manual-934552c832a70206dd026a3d54aee543d902ef4b.tar.gz riscv-isa-manual-934552c832a70206dd026a3d54aee543d902ef4b.tar.bz2 | |
Fixed typo.
Deleted end of line return.
Diffstat (limited to 'src/rnmi.adoc')
| -rw-r--r-- | src/rnmi.adoc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/rnmi.adoc b/src/rnmi.adoc index d19d9e2..63dd473 100644 --- a/src/rnmi.adoc +++ b/src/rnmi.adoc @@ -146,8 +146,7 @@ The RNMI handler can resume original execution using the new MNRET instruction, which restores the PC from `mnepc`, the privilege mode from `mnstatus`, and also sets `mnstatus`.NMIE, which re-enables interrupts. -If the hart encounters an exception while executing in M-mode with the `mnstatus`.NMIE bit clear, the actions taken are the same as if the exception had occurred while `mnstatus`.NMIE were set, except that the program counter is set to the RNMI exception trap handler address (rather than the address -specified by `mtvec`). +If the hart encounters an exception while executing in M-mode with the `mnstatus`.NMIE bit clear, the actions taken are the same as if the exception had occurred while `mnstatus`.NMIE were set, except that the program counter is set to the RNMI exception trap handler address (rather than the address specified by `mtvec`). [NOTE] ==== |