aboutsummaryrefslogtreecommitdiff
path: root/src/priv-preface.tex
diff options
context:
space:
mode:
authorAndrew Waterman <andrew@sifive.com>2018-04-13 01:50:55 -0700
committerAndrew Waterman <aswaterman@gmail.com>2018-04-13 14:08:18 -0700
commit593d641943ee9d0d503a0aac093a63904a42b4bf (patch)
tree1bdaa095e59b69ab823625f1f8c2d7e351fb14f1 /src/priv-preface.tex
parent21b78674f45740481fdf9a1fdeca790893dfa361 (diff)
downloadriscv-isa-manual-593d641943ee9d0d503a0aac093a63904a42b4bf.zip
riscv-isa-manual-593d641943ee9d0d503a0aac093a63904a42b4bf.tar.gz
riscv-isa-manual-593d641943ee9d0d503a0aac093a63904a42b4bf.tar.bz2
Add preface entry
Diffstat (limited to 'src/priv-preface.tex')
-rw-r--r--src/priv-preface.tex1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/priv-preface.tex b/src/priv-preface.tex
index 38a9130..5c8ada3 100644
--- a/src/priv-preface.tex
+++ b/src/priv-preface.tex
@@ -21,6 +21,7 @@ architecture proposal. Changes from version 1.10 include:
\item Specified the behavior of the {\tt misa} and {\em x}{\tt epc} registers in
systems with variable IALIGN.
\item Specified semantics for PMP regions coarser than four bytes.
+\item Specified contents of CSRs across XLEN modification.
\end{itemize}
\newpage