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| author | Bill Traynor <wmat@riscv.org> | 2023-03-30 14:09:49 -0400 |
|---|---|---|
| committer | Bill Traynor <wmat@riscv.org> | 2023-03-30 14:09:49 -0400 |
| commit | b0671ec140c3a8136609b8e1befc5604030ff1b8 (patch) | |
| tree | 984500a97b22506d3c6732091782b375dbe825f2 /src/priv-insns.adoc | |
| parent | cc578b7b196cff613f465de87f452c4c4d61ebb3 (diff) | |
| download | riscv-isa-manual-b0671ec140c3a8136609b8e1befc5604030ff1b8.zip riscv-isa-manual-b0671ec140c3a8136609b8e1befc5604030ff1b8.tar.gz riscv-isa-manual-b0671ec140c3a8136609b8e1befc5604030ff1b8.tar.bz2 | |
Added privileged instructions diag
Implemented privileged instructions diagram as a
bytefield-svg diagram.
Diffstat (limited to 'src/priv-insns.adoc')
| -rw-r--r-- | src/priv-insns.adoc | 94 |
1 files changed, 0 insertions, 94 deletions
diff --git a/src/priv-insns.adoc b/src/priv-insns.adoc index d5c6e11..0020c2d 100644 --- a/src/priv-insns.adoc +++ b/src/priv-insns.adoc @@ -9,98 +9,4 @@ the ECALL and EBREAK instructions, are provided in Volume I of this manual. .RISC-V Privileged Instructions - include::images/bytefield/priv-instr-set.edn[] - -[cols="<,<,<,<,<,<,<,<,<,<,<,<",] -|=== -| | | | | | | | | | | | - -| | | | | | | | | | | | - -| |funct7 | | | |rs2 | |rs1 |funct3 |rd |opcode |R-type - -| |imm[11:0] | | | | | |rs1 |funct3 |rd |opcode |I-type - -| | | | | | | | | | | | - -| |*Trap-Return Instructions* | | | | | | | | | | - -| |0001000 | | | |00010 | |00000 |000 |00000 |1110011 |SRET - -| |0011000 | | | |00010 | |00000 |000 |00000 |1110011 |MRET - -| |0111000 | | | |00010 | |00000 |000 |00000 |1110011 |MNRET - -| | | | | | | | | | | | - -| |*Interrupt-Management Instructions* | | | | | | | | | | - -| |0001000 | | | |00101 | |00000 |000 |00000 |1110011 |WFI - -| | | | | | | | | | | | - -| |*Supervisor Memory-Management Instructions* | | | | | | | | | | - -| |0001001 | | | |rs2 | |rs1 |000 |00000 |1110011 |SFENCE.VMA - -| | | | | | | | | | | | - -| |*Hypervisor Memory-Management Instructions* | | | | | | | | | | - -| |0010001 | | | |rs2 | |rs1 |000 |00000 |1110011 |HFENCE.VVMA - -| |0110001 | | | |rs2 | |rs1 |000 |00000 |1110011 |HFENCE.GVMA - -| | | | | | | | | | | | - -| |*Hypervisor Virtual-Machine Load and Store Instructions* | | | | | | -| | | | - -| |0110000 | | | |00000 | |rs1 |100 |rd |1110011 |HLV.B - -| |0110000 | | | |00001 | |rs1 |100 |rd |1110011 |HLV.BU - -| |0110010 | | | |00000 | |rs1 |100 |rd |1110011 |HLV.H - -| |0110010 | | | |00001 | |rs1 |100 |rd |1110011 |HLV.HU - -| |0110100 | | | |00000 | |rs1 |100 |rd |1110011 |HLV.W - -| |0110010 | | | |00011 | |rs1 |100 |rd |1110011 |HLVX.HU - -| |0110100 | | | |00011 | |rs1 |100 |rd |1110011 |HLVX.WU - -| |0110001 | | | |rs2 | |rs1 |100 |00000 |1110011 |HSV.B - -| |0110011 | | | |rs2 | |rs1 |100 |00000 |1110011 |HSV.H - -| |0110101 | | | |rs2 | |rs1 |100 |00000 |1110011 |HSV.W - -| | | | | | | | | | | | - -| |*Hypervisor Virtual-Machine Load and Store Instructions, RV64 only* | -| | | | | | | | | - -| |0110100 | | | |00001 | |rs1 |100 |rd |1110011 |HLV.WU - -| |0110110 | | | |00000 | |rs1 |100 |rd |1110011 |HLV.D - -| |0110111 | | | |rs2 | |rs1 |100 |00000 |1110011 |HSV.D - -| | | | | | | | | | | | - -| |*_Svinval_ Memory-Management Extension* | | | | | | | | | | - -| |0001011 | | | |rs2 | |rs1 |000 |00000 |1110011 |SINVAL.VMA - -| |0001100 | | | |00000 | |00000 |000 |00000 |1110011 |SFENCE.W.INVAL - -| |0001100 | | | |00001 | |00000 |000 |00000 |1110011 |SFENCE.INVAL.IR - -| |0010011 | | | |rs2 | |rs1 |000 |00000 |1110011 |HINVAL.VVMA - -| |0110011 | | | |rs2 | |rs1 |000 |00000 |1110011 |HINVAL.GVMA - -| | | | | | | | | | | | -|=== |