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author | Andrew Waterman <andrew@sifive.com> | 2021-09-10 03:52:41 -0700 |
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committer | GitHub <noreply@github.com> | 2021-09-10 03:52:41 -0700 |
commit | bac0a5d0a240ec6992f74b79e85d9a55dacb8a80 (patch) | |
tree | 3cca5d22b136154f6116f65d0175a1a39bc4504a /src/machine.tex | |
parent | 216aa2b9d084c04470e4a026e853ac9dd12a4d01 (diff) | |
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Speculative implicit reads, v2 (#724)
* Speculative implicit reads, v2
These constraints are better expressed as PMAs, and so we relax the
unprivileged spec to always allow speculative implicit reads "unless
otherwise specified", then move the constraints into the PMAs.
This proposal piggybacks on the non-idempotence PMA, constraining implicit
reads to within a power-of-2 region of a non-speculative implicit read.
Furthermore, speculative instruction fetch can also access the subsequent
power-of-2 region.
* Add preface entry
Diffstat (limited to 'src/machine.tex')
-rw-r--r-- | src/machine.tex | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/machine.tex b/src/machine.tex index 28c3dae..76b5f4c 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -3276,6 +3276,21 @@ misaligned access using multiple smaller accesses, which could cause unexpected side effects. \end{commentary} +For non-idempotent regions, implicit reads and writes must not be performed +early or speculatively, with the following exceptions. +When a non-speculative implicit read is performed, an implementation is +permitted to additionally read any of the bytes within a naturally aligned +power-of-2 region containing the address of the non-speculative implicit read. +Furthermore, when a non-speculative instruction fetch is performed, an +implementation is permitted to additionally read any of the bytes within the +{\em next} naturally aligned power-of-2 region of the same size (with the +address of the region taken modulo $2^{\text{XLEN}}$). +The results of these additional reads may be used to satisfy subsequent early +or speculative implicit reads. +The size of these naturally aligned power-of-2 regions is +implementation-defined, but, for systems with page-based virtual memory, must +not exceed the smallest supported page size. + \section{Physical Memory Protection} \label{sec:pmp} |