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author | Andrew Waterman <andrew@sifive.com> | 2021-11-26 17:25:45 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-11-26 17:25:45 -0800 |
commit | 3b8f5e2c660411c372c4dd505ee5da0e19427e33 (patch) | |
tree | 2e46b0062e20b4398fd7f210ab2bc388ac95cd04 /src/machine.tex | |
parent | 181d63206b3b542a5913a57e248e7bcef407700f (diff) | |
download | riscv-isa-manual-3b8f5e2c660411c372c4dd505ee5da0e19427e33.zip riscv-isa-manual-3b8f5e2c660411c372c4dd505ee5da0e19427e33.tar.gz riscv-isa-manual-3b8f5e2c660411c372c4dd505ee5da0e19427e33.tar.bz2 |
Avoid use of "timebase"
This is the only place it's used in the whole spec, so eschew it.
Diffstat (limited to 'src/machine.tex')
-rw-r--r-- | src/machine.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/machine.tex b/src/machine.tex index 5f43dc3..817be77 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -2453,7 +2453,7 @@ of that extension. Platforms provide a real-time counter, exposed as a memory-mapped machine-mode read-write register, {\tt mtime}. {\tt mtime} must increment at constant frequency, and the platform must provide a -mechanism for determining the timebase of {\tt mtime}. The {\tt +mechanism for determining the period of an {\tt mtime} tick. The {\tt mtime} register will wrap around if the count overflows. The {\tt mtime} register has a 64-bit precision on all RV32 and RV64 |