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| author | Andrew Waterman <andrew@sifive.com> | 2022-01-06 14:11:56 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-01-06 14:11:56 -0800 |
| commit | 2d284dcd9ca6b006eeea0223d18766d52caa2a43 (patch) | |
| tree | 4aa098f30ad9e6a7732dcc69ac8f51d3ed62fb4d /src/machine.tex | |
| parent | b35a54079e0da11740ce5b1e6db999d1d5172768 (diff) | |
| download | riscv-isa-manual-2d284dcd9ca6b006eeea0223d18766d52caa2a43.zip riscv-isa-manual-2d284dcd9ca6b006eeea0223d18766d52caa2a43.tar.gz riscv-isa-manual-2d284dcd9ca6b006eeea0223d18766d52caa2a43.tar.bz2 | |
Remove misleading text about MPRV for less-privileged modes
...since MPRV cannot be 1 in less-privileged modes any longer.
Closes #807
Diffstat (limited to 'src/machine.tex')
| -rw-r--r-- | src/machine.tex | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/machine.tex b/src/machine.tex index d2c7ed3..c7f6fd0 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -3340,9 +3340,8 @@ instead of the scheme described in this section. \end{commentary} PMP checks are applied to all accesses whose effective privilege mode is S or -U, including instruction fetches in S and U mode, data accesses in S and -U mode when the MPRV bit in the {\tt mstatus} register is clear, and data -accesses in any mode when the MPRV bit in {\tt mstatus} is set and the MPP +U, including instruction fetches and data accesses in S and U mode, and data +accesses in M-mode when the MPRV bit in {\tt mstatus} is set and the MPP field in {\tt mstatus} contains S or U. PMP checks are also applied to page-table accesses for virtual-address translation, for which the effective |