some table fixes and additions of missing formatting

1 files changed, 3 insertions, 8 deletions

diff --git a/src/f-st-ext.adoc b/src/f-st-ext.adoc
index 90239be..7b3d0e9 100644
--- a/src/f-st-ext.adoc
+++ b/src/f-st-ext.adoc
@@ -1,5 +1,5 @@
 [[single-float]]
-== `F` Standard Extension for Single-Precision Floating-Point, Version 2.2
+== F Standard Extension for Single-Precision Floating-Point, Version 2.2
 
 This chapter describes the standard instruction-set extension for
 single-precision floating-point, which is named `F` and adds
@@ -46,7 +46,6 @@ control and status register (CSR). It is a 32-bit read/write register
 that selects the dynamic rounding mode for floating-point arithmetic
 operations and holds the accrued exception flags, as shown in <<fcsr>>.
 
-
 include::images/wavedrom/float-csr.adoc[]
 [[fcsr]]
 .Floating-point control and status register
@@ -69,7 +68,6 @@ then writing a new value obtained from the three least-significant bits
 of integer register _rs1_ into `frm`. FRFLAGS and FSFLAGS are defined
 analogously for the Accrued Exception Flags field `fflags`.
 
-
 Bits 31–8 of the `fcsr` are reserved for other standard extensions. If
 these extensions are not present, implementations shall ignore writes to
 these bits and supply a zero value when read. Standard software should
@@ -104,7 +102,6 @@ particular, with regard to decoding legal vs. reserved encodings).
 | | |In Rounding Mode register, _reserved_.
 |===
 
-
 [NOTE]
 ====
 The C99 language standard effectively mandates the provision of a
@@ -122,7 +119,6 @@ reserved encoding, so implementations compatible with the ratified spec
 are compatible with the weakened spec.
 ====
 
-
 The accrued exception flags indicate the exception conditions that have
 arisen on any floating-point arithmetic instruction since the field was
 last reset by software, as shown in <<bitdef>>. The base
@@ -152,14 +148,14 @@ ultimately chose to omit these instructions to keep the ISA simple.
 ====
 
 === NaN Generation and Propagation
-(((NaN, generation)))
-(((NaN, propagation)))
 
 Except when otherwise stated, if the result of a floating-point
 operation is NaN, it is the canonical NaN. The canonical NaN has a
 positive sign and all significand bits clear except the MSB, a.k.a. the
 quiet bit. For single-precision floating-point, this corresponds to the
 pattern `0x7fc00000`.
+(((NaN, generation)))
+(((NaN, propagation)))
 
 [TIP]
 ====
@@ -460,7 +456,6 @@ include::images/wavedrom/spfloat-mv.adoc[]
 .SP floating point move
 image::image_placeholder.png[]
 
-
 [TIP]
 ====
 The base floating-point ISA was defined so as to allow implementations