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| author | elisa <elisa@riscv.org> | 2021-10-28 14:25:12 -0700 |
|---|---|---|
| committer | elisa <elisa@riscv.org> | 2021-10-28 14:25:12 -0700 |
| commit | 364c03e71fd206c030d1ffb13b50f91ffd910be4 (patch) | |
| tree | bd84680727581685c68b8389ee44d4dd6833357c /src/f-st-ext.adoc | |
| parent | 3daeab91d68fefef377e204f0bc47018c605aeb0 (diff) | |
| download | riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.zip riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.tar.gz riscv-isa-manual-364c03e71fd206c030d1ffb13b50f91ffd910be4.tar.bz2 | |
formatting refinements
Diffstat (limited to 'src/f-st-ext.adoc')
| -rw-r--r-- | src/f-st-ext.adoc | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/src/f-st-ext.adoc b/src/f-st-ext.adoc index 1bd2f9a..88ed2ea 100644 --- a/src/f-st-ext.adoc +++ b/src/f-st-ext.adoc @@ -2,10 +2,10 @@ == F Standard Extension for Single-Precision Floating-Point, Version 2.2 This chapter describes the standard instruction-set extension for -single-precision floating-point, which is named `F` and adds +single-precision floating-point, which is named "F" and adds single-precision floating-point computational instructions compliant with the IEEE 754-2008 arithmetic standard cite:[ieee754-2008]. The F extension depends on -the `Zicsr` extension for control and status register access. +the "Zicsr" extension for control and status register access. === F Register State @@ -36,46 +36,46 @@ floating-point register file state can reduce context-switch overhead. ==== [[fprs]] -.RISC-V standard F exten[sion single-precision floating-point state +.RISC-V standard F extension single-precision floating-point state [col[s="<|^|>"|option[s="header",width="50%",align="center"grid="none"] |=== -<| [small]#FLEN-1#| >| [small]#0# -3+^| [small]#f0# -3+^| [small]#f1# -3+^| [small]#f2# -3+^| [small]#f3# -3+^| [small]#f4# -3+^| [small]#f5# -3+^| [small]#f6# -3+^| [small]#f7# -3+^| [small]#f8# -3+^| [small]#f9# -3+^| [small]#f10# -3+^| [small]#f11# -3+^| [small]#f12# -3+^| [small]#f13# -3+^| [small]#f14# -3+^| [small]#f15# -3+^| [small]#f16# -3+^| [small]#f17# -3+^| [small]#f18# -3+^| [small]#f19# -3+^| [small]#f20# -3+^| [small]#f21# -3+^| [small]#f22# -3+^| [small]#f23# -3+^| [small]#f24# -3+^| [small]#f25# -3+^| [small]#f26# -3+^| [small]#f27# -3+^| [small]#f28# -3+^| [small]#f29# -3+^| [small]#f30# -3+^| [small]#f31# -3+^| [small]#FLEN# -| [small]#31#| >| [small]#0# -3+^| [small]#fcsr# -3+^| [small]#32# +<| [.small]#FLEN-1#| >| [.small]#0# +3+^| [.small]#f0# +3+^| [.small]#f1# +3+^| [.small]#f2# +3+^| [.small]#f3# +3+^| [.small]#f4# +3+^| [.small]#f5# +3+^| [.small]#f6# +3+^| [.small]#f7# +3+^| [.small]#f8# +3+^| [.small]#f9# +3+^| [.small]#f10# +3+^| [.small]#f11# +3+^| [.small]#f12# +3+^| [.small]#f13# +3+^| [.small]#f14# +3+^| [.small]#f15# +3+^| [.small]#f16# +3+^| [.small]#f17# +3+^| [.small]#f18# +3+^| [.small]#f19# +3+^| [.small]#f20# +3+^| [.small]#f21# +3+^| [.small]#f22# +3+^| [.small]#f23# +3+^| [.small]#f24# +3+^| [.small]#f25# +3+^| [.small]#f26# +3+^| [.small]#f27# +3+^| [.small]#f28# +3+^| [.small]#f29# +3+^| [.small]#f30# +3+^| [.small]#f31# +3+^| [.small]#FLEN# +| [.small]#31#| >| [.small]#0# +3+^| [.small]#fcsr# +3+^| [.small]#32# |=== === Floating-Point Control and Status Register @@ -127,7 +127,7 @@ particular, with regard to decoding legal vs. reserved encodings). [[rm]] .Rounding mode encoding. -[cols="^,^,<",options="header",] +[cols="^1,^1,<3",options="header",] |=== |Rounding Mode |Mnemonic |Meaning |000 |RNE |Round to Nearest, ties to Even |