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| author | leahyao <65967522+leahyao@users.noreply.github.com> | 2020-09-27 13:27:15 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-26 22:27:15 -0700 |
| commit | 7df5517f866f660e6143bdae674b0229147739bb (patch) | |
| tree | db1d01688b612680209f0d536908ba0151f023f4 /src/dep-table.tex | |
| parent | 6bff27cb63c6ac4c0574f308a6cce82b329b5895 (diff) | |
| download | riscv-isa-manual-7df5517f866f660e6143bdae674b0229147739bb.zip riscv-isa-manual-7df5517f866f660e6143bdae674b0229147739bb.tar.gz riscv-isa-manual-7df5517f866f660e6143bdae674b0229147739bb.tar.bz2 | |
change FCVT.D.S frm to useless (#591)
FCVT.D.S will never round, frm* and if rm=111 shouldn't be included
Diffstat (limited to 'src/dep-table.tex')
| -rw-r--r-- | src/dep-table.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dep-table.tex b/src/dep-table.tex index 1873ea1..266cc76 100644 --- a/src/dep-table.tex +++ b/src/dep-table.tex @@ -415,7 +415,7 @@ $^\ddagger$The instruction carries dependencies from source register(s) to desti \cline{2-4} FCVT.S.D & {\em rs1}, frm$^*$ & {\em rd} & NV, OF, UF, NX & $^*$if rm=111 \\ \cline{2-4} - FCVT.D.S & {\em rs1}, frm$^*$ & {\em rd} & NV & $^*$if rm=111 \\ + FCVT.D.S & {\em rs1} & {\em rd} & NV & & \\ \cline{2-4} FEQ.D & {\em rs1}, {\em rs2} & {\em rd} & NV & \\ \cline{2-4} |