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| author | elisa <elisa@riscv.org> | 2021-10-20 12:00:49 -0700 |
|---|---|---|
| committer | elisa <elisa@riscv.org> | 2021-10-20 12:00:49 -0700 |
| commit | a4954af2fd406e6f7fb9a1925d5b870c6bb155ec (patch) | |
| tree | 7a8bc95b902ef395f1be7237930e2547eac2da1d /src/counters.adoc | |
| parent | e57f365c83f562272f3d21777358d6c42d7a9d27 (diff) | |
| download | riscv-isa-manual-a4954af2fd406e6f7fb9a1925d5b870c6bb155ec.zip riscv-isa-manual-a4954af2fd406e6f7fb9a1925d5b870c6bb155ec.tar.gz riscv-isa-manual-a4954af2fd406e6f7fb9a1925d5b870c6bb155ec.tar.bz2 | |
table and diagram fixes
Diffstat (limited to 'src/counters.adoc')
| -rw-r--r-- | src/counters.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/counters.adoc b/src/counters.adoc index a92b3fc..38f7ac3 100644 --- a/src/counters.adoc +++ b/src/counters.adoc @@ -46,7 +46,7 @@ environment should provide a means to determine the current rate [TIP] ==== RDCYCLE is intended to return the number of cycles executed by the -processor core, not the hart. Precisely defining what is a "core" +processor core, not the hart. Precisely defining what is a "core" is difficult given some implementation choices (e.g., AMD Bulldozer). Precisely defining what is a "clock cycle" is also difficult given the range of implementations (including software emulations), but the intent |