Delete detailed text surrounding RVC immediates

The metric is vague, and the only important point is the design
pattern, not the exact cost.

Resolves #659

1 files changed, 1 insertions, 4 deletions

diff --git a/src/c.tex b/src/c.tex
index fc174da..92dd11c 100644
--- a/src/c.tex
+++ b/src/c.tex
@@ -221,10 +221,7 @@ the number of immediate muxes required.
 The immediate fields are scrambled in the instruction formats instead
 of in sequential order so that as many bits as possible are in the
 same position in every instruction, thereby simplifying
-implementations. For example, immediate bits 17---10 are always sourced from
-the same instruction bit positions.  Five other immediate bits (5, 4,
-3, 1, and 0) have just two source instruction bits, while four (9, 7,
-6, and 2) have three sources and one (8) has four sources.
+implementations.
 \end{commentary}
 
 For many RVC instructions, zero-valued immediates are disallowed and