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| author | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-02-13 08:00:25 -0800 |
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| committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-02-13 08:00:25 -0800 |
| commit | 5e42ce2bd9caf8d907520075a8e9dc564c1f4d30 (patch) | |
| tree | dc26f16742152a79d3b297e37e0d49a00ed81f79 /src/c.tex | |
| parent | acf9e5e7afb5ad937c99c21de0ed264d57a83f18 (diff) | |
| download | riscv-isa-manual-5e42ce2bd9caf8d907520075a8e9dc564c1f4d30.zip riscv-isa-manual-5e42ce2bd9caf8d907520075a8e9dc564c1f4d30.tar.gz riscv-isa-manual-5e42ce2bd9caf8d907520075a8e9dc564c1f4d30.tar.bz2 | |
Clarified instruction misaligned exceptions on JAL/JALR.
Diffstat (limited to 'src/c.tex')
| -rw-r--r-- | src/c.tex | 6 |
1 files changed, 5 insertions, 1 deletions
@@ -34,7 +34,11 @@ versions of common 32-bit RISC-V instructions when: The C extension is compatible with all other standard instruction extensions. The C extension allows 16-bit instructions to be freely intermixed with 32-bit instructions, with the latter now able to start -on any 16-bit boundary. +on any 16-bit boundary. With the addition of the C extension, JAL and +JALR instructions will no longer raise an instruction misaligned +exception. + +\pagebreak \begin{commentary} Removing the 32-bit alignment constraint on the original 32-bit |