A pair of somewhat pedantic changes to the wording of C.NOP (#248)

* "c.addi x0, 0" isn't a legal instruction

I was reviewing some QEMU patches recently and noticed an oddity of the
current description of the ISA manual: the NOP instruction can also
decode as a valid ADDI instruction, but the C.NOP instruction cannot
decode as a valid C.ADDI instruction despite the ISA manual saying
"C.NOP is encoded as c.addi x0, 0 and so expands to addi x0, x0, 0".
This isn't a big deal, because "c.nop" does match what you'd expect the
encoding of "c.addi x0, 0", but it is technically incorrect because the
instruction "c.addi x0, 0" doesn't exist.

This patch fixes the text of "c.nop" to just say it expands to "NOP".

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

* The performance counters must respect "c.nop"

The non-compressed "nop" mentions that performance counters are modified
by the instruction, but the text of the compressed instruction make it
sound like that's not the case.

1 files changed, 2 insertions, 2 deletions

diff --git a/src/c.tex b/src/c.tex
index 9a9edfe..1a308d2 100644
--- a/src/c.tex
+++ b/src/c.tex
@@ -1099,8 +1099,8 @@ C.NOP & 0 & 0 & 0 & C1 \\
 \end{center}
 
 C.NOP is a CI-format instruction that does not change any user-visible state,
-except for advancing the {\tt pc}.  C.NOP is encoded as {\tt c.addi x0, 0} and
-so expands to {\tt addi x0, x0, 0}.
+except for advancing the {\tt pc} and incrementing any applicable performance
+counters.  C.NOP expands to {\tt nop}.
 
 \subsection*{Breakpoint Instruction}
 \vspace{-0.4in}