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author | Andrew Waterman <andrew@sifive.com> | 2019-06-18 15:58:08 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2019-10-02 17:25:49 +0200 |
commit | 02ebc4273e6ab3e9024f34d1f5658d643db3bd84 (patch) | |
tree | 2d2a840d39159df683ad8d6a0ab580183d01d826 /src/c.tex | |
parent | 1d64f7350490277ec5da8c2e992b7eff2cda621f (diff) | |
download | riscv-isa-manual-02ebc4273e6ab3e9024f34d1f5658d643db3bd84.zip riscv-isa-manual-02ebc4273e6ab3e9024f34d1f5658d643db3bd84.tar.gz riscv-isa-manual-02ebc4273e6ab3e9024f34d1f5658d643db3bd84.tar.bz2 |
Weaken LR/SC progress guarantee
Diffstat (limited to 'src/c.tex')
-rw-r--r-- | src/c.tex | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -1173,10 +1173,10 @@ C.EBREAK shares the opcode with the C.ADD instruction, but with {\em \section{Usage of C Instructions in LR/SC Sequences} -On implementations that support the C extension, compressed forms of -the I instructions permitted inside LR/SC sequences can be used while -retaining the guarantee of eventual success, as described in -Section~\ref{lrscseq}. +On implementations that support the C extension, compressed forms of the +I instructions permitted inside constrained LR/SC sequences, as described in +Section~\ref{sec:lrscseq}, are also permitted inside constrained LR/SC +sequences. \begin{commentary} The implication is that any implementation that claims to support both |