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| author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-11-16 18:07:43 -0800 |
|---|---|---|
| committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-11-16 18:07:43 -0800 |
| commit | 82823c0343f9b953e275db7072bb2bbd6c00ed17 (patch) | |
| tree | 23278ae8eaf9383dc3619555d848efbb49472e9a /src/a.tex | |
| parent | 242329fd1bf735fd34bcf4b8e26401e4102bcf60 (diff) | |
| download | riscv-isa-manual-82823c0343f9b953e275db7072bb2bbd6c00ed17.zip riscv-isa-manual-82823c0343f9b953e275db7072bb2bbd6c00ed17.tar.gz riscv-isa-manual-82823c0343f9b953e275db7072bb2bbd6c00ed17.tar.bz2 | |
Improved wording.
Diffstat (limited to 'src/a.tex')
| -rw-r--r-- | src/a.tex | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -155,9 +155,9 @@ FENCE.I, and SYSTEM instructions. The code to retry a failing LR/SC sequence can contain backward jumps and/or branches to repeat the LR/SC sequence, but otherwise has the same constraints. The SC must be to the same address and of the same data size as the latest LR -executed. The execution environment can constrain the instruction and +executed. The execution environment can limit the instruction and data memory regions within which forward progress is guaranteed. -LR/SC sequences that do not meet these constraints might complete on +LR/SC sequences that do not meet all these constraints might complete on some attempts on some implementations, but there is no guarantee of eventual success. |