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authorPasquale Davide Schiavone <pschiavo@iis.ee.ethz.ch>2020-09-12 01:25:50 +0200
committerGitHub <noreply@github.com>2020-09-11 16:25:50 -0700
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update OpenHW cores (#578)
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@@ -20,8 +20,8 @@ Project Name | Maintainers | Point of Contact
------------- | ------------------------------- | ----------------------------------------------------------- | ----------------- | ---------------------------------------------------
Rocket | SiFive, UC Berkeley | [Andrew Waterman](mailto:andrew@sifive.com), SiFive | 1 | https://github.com/freechipsproject/rocket-chip
BOOM | UC Berkeley | [Christopher Celio](mailto:celio@berkeley.edu) | 2 | https://github.com/ucb-bar/riscv-boom
-Ariane | PULP Platform | [Florian Zaruba](mailto:zarubaf@iis.ee.ethz.ch), ETH Zurich | 3 | https://github.com/pulp-platform/ariane
-RI5CY | PULP Platform | [Frank K. Gürkaynak](mailto:kgf@iis.ee.ethz.ch), ETH Zurich | 4 | https://github.com/pulp-platform/riscv
+CVA6 | OpenHW Group | [Florian Zaruba](mailto:florian@openhwgroup.org), OpenHW Group | 3 | https://github.com/openhwgroup/cva6
+CV32E40P | OpenHW Group | [Davide Schiavone](mailto:davide@openhwgroup.org), OpenHW Group | 4 | https://github.com/openhwgroup/cv32e40p
Spike | SiFive, UC Berkeley | [Andrew Waterman](mailto:andrew@sifive.com), SiFive | 5 | https://github.com/riscv/riscv-isa-sim
E-Class | IIT Madras | [Neel Gala](mailto:neelgala@gmail.com) | 6 | https://gitlab.com/shaktiproject/cores/e-class
ORCA | VectorBlox | [Joel Vandergriendt](mailto:joel@vectorblox.com) | 7 | https://github.com/vectorblox/orca