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| author | Thomas Wicki <35509028+tmw-wdc@users.noreply.github.com> | 2019-07-12 18:12:02 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-07-12 18:12:02 -0700 |
| commit | 18266ef5ef0400621f2545c51ca008529653440b (patch) | |
| tree | 21eded776886c3846e13946f0bd72dce98b3aeeb /marchid.md | |
| parent | 3e1e489798d62a57ba970c155ccf74a6a1ff890a (diff) | |
| download | riscv-isa-manual-18266ef5ef0400621f2545c51ca008529653440b.zip riscv-isa-manual-18266ef5ef0400621f2545c51ca008529653440b.tar.gz riscv-isa-manual-18266ef5ef0400621f2545c51ca008529653440b.tar.bz2 | |
Update SweRV project URL (#408)
Diffstat (limited to 'marchid.md')
| -rw-r--r-- | marchid.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -28,7 +28,7 @@ ORCA | VectorBlox | [Joel Vandergriendt](mailto:jo SCR1 | Syntacore | [Dmitri Pavlov](mailto:dmitri.pavlov@syntacore.com), Syntacore| 8 | https://github.com/syntacore/scr1 YARVI | Tommy Thorn's Priceless Services| [Tommy Thorn](mailto:tommy-github2@thorn.ws) | 9 | https://github.com/tommythorn/yarvi RVBS | Alexandre Joannou, University of Cambridge| [Alexandre Joannou](mailto:aj443@cl.cam.ac.uk) | 10 | https://github.com/CTSRD-CHERI/RVBS -SweRV EH1 | Western Digital Corporation | [Thomas Wicki](mailto:Thomas.Wicki@wdc.com) | 11 | https://github.com/westerndigitalcorporation/swerv_eh1 +SweRV EH1 | Western Digital Corporation | [Thomas Wicki](mailto:Thomas.Wicki@wdc.com) | 11 | https://github.com/chipsalliance/Cores-SweRV MSCC | Rongcui Dong | [Rongcui Dong](mailto:rongcuid@outlook.com) | 12 | https://github.com/rongcuid/MSCC BlackParrot | The World | [Michael B. Taylor](mailto:prof.taylor@gmail.com), U. Washington | 13 | https://github.com/black-parrot BaseJump Manycore | U. Washington | [Michael B. Taylor](mailto:prof.taylor@gmail.com), U. Washington | 14 | https://github.com/bespoke-silicon-group/bsg_manycore |