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author | Andrew Waterman <andrew@sifive.com> | 2024-06-20 16:16:28 -0700 |
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committer | GitHub <noreply@github.com> | 2024-06-20 16:16:28 -0700 |
commit | d237561e6495861c74c55d10b0ec763a4a7acf11 (patch) | |
tree | 1b12bfdf82463665e39409b6c008963825822207 | |
parent | a99065df1408cea37551d85b4422d001b6e9797f (diff) | |
download | riscv-isa-manual-d237561e6495861c74c55d10b0ec763a4a7acf11.zip riscv-isa-manual-d237561e6495861c74c55d10b0ec763a4a7acf11.tar.gz riscv-isa-manual-d237561e6495861c74c55d10b0ec763a4a7acf11.tar.bz2 |
Clarify that changes to xSSE need no SFENCE (#1467)
-rw-r--r-- | src/priv-cfi.adoc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/priv-cfi.adoc b/src/priv-cfi.adoc index 1b03257..082ceb7 100644 --- a/src/priv-cfi.adoc +++ b/src/priv-cfi.adoc @@ -196,6 +196,11 @@ S-mode is not implemented, activation in U-mode is also not supported. These functionalities may be introduced in a future standard extension. ==== +NOTE: Changes to `xSSE` take effect immediately; address-translation caches +need not be synchronized with SFENCE.VMA, HFENCE.GVMA, or HFENCE.VVMA +instructions. + + [[SSMP]] ==== Shadow Stack Memory Protection |