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| author | Andrew Waterman <andrew@sifive.com> | 2024-07-08 15:44:51 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-08 15:44:51 -0700 |
| commit | 94c4194793036391dbb01db68071f26cb223513a (patch) | |
| tree | c35bcc77a044719a1c6b5219a1b8be756877e31c | |
| parent | 1f58306f4378cdea4aabd99686d2f9a0bb84fb9e (diff) | |
| parent | 12ba6da1442a19093f37acb0f8a4b2dd53f4958e (diff) | |
| download | riscv-isa-manual-94c4194793036391dbb01db68071f26cb223513a.zip riscv-isa-manual-94c4194793036391dbb01db68071f26cb223513a.tar.gz riscv-isa-manual-94c4194793036391dbb01db68071f26cb223513a.tar.bz2 | |
Merge pull request #1511 from ved-rivos/menvcfg_sse
Clarify henvcfg/senvcfg.sse are read-only zero when menvcfg.sse is 0
| -rw-r--r-- | src/machine.adoc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/machine.adoc b/src/machine.adoc index fa22146..13d264d 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -2197,9 +2197,11 @@ the following rules apply to privilege modes that are less than M: * 32-bit Zicfiss instructions will revert to their behavior as defined by Zimop. * 16-bit Zicfiss instructions will revert to their behavior as defined by Zcmop. * The `pte.xwr=010b` encoding in VS/S-stage page tables becomes reserved. -* The `henvcfg.SSE` and `senvcfg.SSE` fields will read as zero and are read-only. * `SSAMOSWAP.W/D` raises an illegal-instruction exception. +When `menvcfg.SSE` is 0, the `henvcfg.SSE` and `senvcfg.SSE` fields are +read-only zero. + The Ssdbltrp extension adds the double-trap-enable (`DTE`) field in `menvcfg`. When `menvcfg.DTE` is zero, the implementation behaves as though Ssdbltrp is not implemented. When Ssdbltrp is not implemented `sstatus.SDT`, `vsstatus.SDT`, and |