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author | Andrew Waterman <andrew@sifive.com> | 2024-05-01 15:38:16 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2024-05-01 15:39:00 -0700 |
commit | 8c2e1aeb39f054b406cb413f4a76e108b8d99ee7 (patch) | |
tree | 37aa06427a4a38edc6435fbece6ca10e9eed798a | |
parent | 903996c3c6152b456e9747a85125f96091ae04a7 (diff) | |
download | riscv-isa-manual-8c2e1aeb39f054b406cb413f4a76e108b8d99ee7.zip riscv-isa-manual-8c2e1aeb39f054b406cb413f4a76e108b8d99ee7.tar.gz riscv-isa-manual-8c2e1aeb39f054b406cb413f4a76e108b8d99ee7.tar.bz2 |
Clarify that CSR implicit write ordering rule isn't specific to increments
See https://github.com/riscv/riscv-debug-spec/issues/1026#issuecomment-2088872276
-rw-r--r-- | src/zicsr.adoc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/zicsr.adoc b/src/zicsr.adoc index f5096c2..0e16de4 100644 --- a/src/zicsr.adoc +++ b/src/zicsr.adoc @@ -157,7 +157,8 @@ Some CSRs, such as the instructions-retired counter, `instret`, may be modified as side effects of instruction execution. In these cases, if a CSR access instruction reads a CSR, it reads the value prior to the execution of the instruction. If a CSR access instruction writes such a -CSR, the write is done instead of the increment. In particular, a value +CSR, the explicit write is done instead of the update from the side effect. +In particular, a value written to `instret` by one instruction will be the value read by the following instruction. |