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authorAndrew Waterman <andrew@sifive.com>2019-03-07 21:46:10 -0800
committerAndrew Waterman <andrew@sifive.com>2019-03-07 21:46:10 -0800
commit6542a199007260e921932e1e04d61176788ec83a (patch)
tree381846d658fa749e12ca400df3179c6a06b8a1cc
parentf3663bddccd838842154aed6db44d93dfc19d009 (diff)
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Add software constraint for future global-ASID extension
Closes #348
-rw-r--r--src/priv-preface.tex4
-rw-r--r--src/riscv-privileged.tex6
-rw-r--r--src/supervisor.tex16
3 files changed, 23 insertions, 3 deletions
diff --git a/src/priv-preface.tex b/src/priv-preface.tex
index 7df25b2..820e347 100644
--- a/src/priv-preface.tex
+++ b/src/priv-preface.tex
@@ -34,6 +34,10 @@ The changes in this version of the document include:
required to, clear LR reservations if A extension present.
\item The virtual-memory system no longer permits supervisor mode to execute
instructions from user pages, regardless of the SUM setting.
+\item Software is strongly recommended to allocate ASIDs globally, so that
+ a future extension can globalize ASIDs for improved performance and hardware
+ flexibility.
+\item SFENCE.VMA semantics have been clarified.
\item Made the {\tt mstatus}.MPP field \warl, rather than \wlrl.
\item Made the unused {\em x}{\tt ip} fields \wpri, rather than \wiri.
\item Made the unused {\tt misa} fields \wlrl, rather than \wiri.
diff --git a/src/riscv-privileged.tex b/src/riscv-privileged.tex
index cd5d878..c60993c 100644
--- a/src/riscv-privileged.tex
+++ b/src/riscv-privileged.tex
@@ -33,11 +33,11 @@ Contributors to all versions of the spec in alphabetical order (please contact
editors to suggest corrections): Krste Asanovi\'{c}, Peter Ashenden, Rimas
Avi\v{z}ienis, Jacob Bachmeyer, Allen J. Baum, Paolo Bonzini, Ruslan Bukin,
Christopher Celio, Chuanhua Chang, David Chisnall, Anthony Coulter, Palmer Dabbelt, Monte
-Dalrymple, Dennis Ferguson, Mike Frysinger, John Hauser, David Horner, Olof
-Johansson, Yunsup Lee, Andrew Lutomirski, Prashanth Mundkur,
+Dalrymple, Dennis Ferguson, Gary Guo, Mike Frysinger, John Hauser, David Horner, Olof
+Johansson, David Kruckemyer, Yunsup Lee, Andrew Lutomirski, Prashanth Mundkur,
Jonathan Neusch{\"a}fer, Rishiyur
Nikhil, Stefan O'Rear, Albert Ou, John Ousterhout, David Patterson, Dmitri
-Pavlov, Kade Phillips, Colin Schmidt, Michael Taylor, Wesley Terpstra, Matt Thomas, Tommy Thorn, Ray
+Pavlov, Kade Phillips, Josh Scheid, Colin Schmidt, Michael Taylor, Wesley Terpstra, Matt Thomas, Tommy Thorn, Ray
VanDeWalker, Megan Wachs, Steve Wallach, Andrew Waterman, Clifford Wolf,
and Reinoud Zandijk.
diff --git a/src/supervisor.tex b/src/supervisor.tex
index 316c69c..5bbcfe5 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -1041,6 +1041,22 @@ execute SFENCE.VMA in accordance with the previous bullet point.
\end{itemize}
\end{commentary}
+For forward compatibility with future versions of this specification,
+supervisor software should adhere to the following constraints on ASID usage.
+Supervisor software that uses ASIDs should use a nonzero ASID value to refer to
+the same address space across all harts in the SEE and should not use an ASID
+value of 0. Supervisor software that does not use ASIDs should always set the
+ASID field in the {\tt satp} CSR to 0.
+
+\begin{commentary}
+A future extension may define ASIDs to be global across the SEE, facilitating
+such optimizations as multicast TLB shootdown and sharing translation caches
+between harts.
+
+The extension will provide a mechanism so that existing supervisor software
+that always uses ASID 0 will continue to function as it currently does.
+\end{commentary}
+
\section{Sv32: Page-Based 32-bit Virtual-Memory Systems}
\label{sec:sv32}