diff options
| author | John Hauser <31252952+jhauser-us@users.noreply.github.com> | 2021-11-12 14:59:42 -0800 |
|---|---|---|
| committer | Bill Traynor <btraynor@gmail.com> | 2022-07-26 11:19:26 -0400 |
| commit | 5568da2a415649c68634f91101a1ab2967146c80 (patch) | |
| tree | ee252fab6133bb6d90527a434afe1161a7a7ba2a | |
| parent | 0ea40953b19f1004e8472e2e534081ffaf19bbd2 (diff) | |
| download | riscv-isa-manual-5568da2a415649c68634f91101a1ab2967146c80.zip riscv-isa-manual-5568da2a415649c68634f91101a1ab2967146c80.tar.gz riscv-isa-manual-5568da2a415649c68634f91101a1ab2967146c80.tar.bz2 | |
Clarify condition when virtual instruction trap will occur (#773)
| -rw-r--r-- | src/hypervisor.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/hypervisor.tex b/src/hypervisor.tex index 9987468..cbf024a 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -2809,7 +2809,7 @@ separately. When V=1, a virtual instruction exception (code 22) is normally raised instead of an illegal instruction exception if the attempted instruction is \textit{HS-qualified} -but is prevented from executing when V=1 due to +but is prevented from executing when V=1 either due to insufficient privilege or because the instruction is expressly disabled by a supervisor or hypervisor CSR such as {\tt scounteren} or {\tt hcounteren}. An instruction is \textit{HS-qualified} if it would be valid to execute |