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author | Bill Traynor <wmat@riscv.org> | 2024-07-19 09:28:27 -0400 |
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committer | GitHub <noreply@github.com> | 2024-07-19 09:28:27 -0400 |
commit | 176d10ada5d8cf8b311ff1f715ab49a2362f892f (patch) | |
tree | 32ce813cc121c72c277bb4939c45d6375fd7f4ed | |
parent | 3c1d60298f16523aba30d45ba4d7c9381a4e2d4c (diff) | |
parent | fbc7b01a159345ab85106cec299da8eb8b05b53e (diff) | |
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Merge pull request #1548 from riscv/1546-typo-in-clui-immediate-fieldriscv-isa-release-176d10a-2024-07-19
Typo change imm to nzimm.
-rw-r--r-- | src/images/wavedrom/c-integer-const-gen.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/images/wavedrom/c-integer-const-gen.adoc b/src/images/wavedrom/c-integer-const-gen.adoc index b6ae85b..977ddb0 100644 --- a/src/images/wavedrom/c-integer-const-gen.adoc +++ b/src/images/wavedrom/c-integer-const-gen.adoc @@ -4,7 +4,7 @@ .... {reg: [ {bits: 2, name: 'op', attr: ['2','C1', 'C1']}, - {bits: 5, name: 'imm[4:0]', attr: ['5','imm[4:0]','imm[16:12]']}, + {bits: 5, name: 'imm[4:0]', attr: ['5','imm[4:0]','nzimm[16:12]']}, {bits: 5, name: 'rd', attr: ['5','dest != 0', 'dest != {0, 2}']}, {bits: 1, name: 'imm[5]', attr: ['1','imm[5]', 'nzimm[17]'],}, {bits: 3, name: 'funct3', attr: ['3','C.LI', 'C.LUI'],}, |