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| author | Tsukasa #01 (a4lg) <li@livegrid.org> | 2022-01-16 09:10:33 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-01-15 16:10:33 -0800 |
| commit | f8614dc09c6ce1667cc70be7bdeda6cd7382e5f1 (patch) | |
| tree | 2a26494d27e4e02eb8120800070c4d1194c5ec78 | |
| parent | 599c9f1c76fe59ee912019055ebf721d08980e43 (diff) | |
| download | riscv-isa-manual-f8614dc09c6ce1667cc70be7bdeda6cd7382e5f1.zip riscv-isa-manual-f8614dc09c6ce1667cc70be7bdeda6cd7382e5f1.tar.gz riscv-isa-manual-f8614dc09c6ce1667cc70be7bdeda6cd7382e5f1.tar.bz2 | |
Zihintntl: Fix number of hint instruction variants (#812)
| -rw-r--r-- | src/zihintntl.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/zihintntl.tex b/src/zihintntl.tex index 4b90ccc..6dc7824 100644 --- a/src/zihintntl.tex +++ b/src/zihintntl.tex @@ -5,7 +5,7 @@ The NTL instructions are HINTs that indicate that the explicit memory accesses o instruction (henceforth ``target instruction'') exhibit poor temporal locality of reference. The NTL instructions do not change architectural state, nor do they alter the architecturally visible effects of the target instruction. -Three variants are provided: +Four variants are provided: The NTL.P1 instruction indicates that the target instruction does not exhibit temporal locality within the capacity of the innermost level |