Draft of WFMI instruction specwfmi

3 files changed, 64 insertions, 12 deletions

diff --git a/src/hypervisor.tex b/src/hypervisor.tex
index 93e68fd..abed788 100644
--- a/src/hypervisor.tex
+++ b/src/hypervisor.tex
@@ -268,7 +268,7 @@ exceptions.
 When VTSR=1, an attempt in VS-mode to execute SRET raises a virtual
 instruction exception.
 When VTW=1 (and assuming {\tt mstatus}.TW=0), an attempt in VS-mode to
-execute WFI raises a virtual instruction exception if the WFI does not
+execute WF[M]I raises a virtual instruction exception if the WF[M]I does not
 complete within an implementation-specific, bounded time limit.
 When VTVM=1, an attempt in VS-mode to execute SFENCE.VMA or to access CSR
 {\tt satp} raises a virtual instruction exception.
@@ -2609,12 +2609,12 @@ attempts to execute a hypervisor instruction (HLV, HLVX, HSV, or HFENCE)
 or to access an implemented hypervisor CSR or VS CSR;
 
 \item
-in VU-mode, attempts to execute WFI or a
+in VU-mode, attempts to execute WF[M]I or a
 supervisor instruction (SRET or SFENCE),
 or to access an implemented supervisor CSR;
 
 \item
-in VS-mode, attempts to execute WFI when {\tt hstatus}.VTW=1 and
+in VS-mode, attempts to execute WF[M]I when {\tt hstatus}.VTW=1 and
 {\tt mstatus}.TW=0, unless the instruction completes within an
 implementation-specific, bounded time;
 
diff --git a/src/machine.tex b/src/machine.tex
index 666700e..16f0e30 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -834,26 +834,26 @@ hooks necessary to lazily populate shadow page tables.
 \end{commentary}
 
 The TW (Timeout Wait) bit is a \warl\ field that supports intercepting the WFI
-instruction (see Section~\ref{wfi}).
-When TW=0, the WFI instruction may execute in lower
+and WFMI instructions (see Section~\ref{wfi}).
+When TW=0, the WF[M]I instruction may execute in lower
 privilege modes when not prevented for some other reason.  When TW=1,
-then if WFI is executed in any less-privileged mode, and it does not complete
-within an implementation-specific, bounded time limit, the WFI instruction
+then if WF[M]I is executed in any less-privileged mode, and it does not complete
+within an implementation-specific, bounded time limit, the WF[M]I instruction
 causes an illegal instruction exception.  The time limit may always be 0, in which
-case WFI always causes an illegal instruction exception in less-privileged modes
+case WF[M]I always causes an illegal instruction exception in less-privileged modes
 when TW=1.  TW is hard-wired to 0 when there are no modes less privileged than
 M.
 
 \begin{commentary}
-Trapping the WFI
-instruction can trigger a world switch to another guest OS, rather than
+Trapping the WFI and WFMI
+instructions can trigger a world switch to another guest OS, rather than
 wastefully idling in the current guest.
 \end{commentary}
 
-When S-mode is implemented, then executing WFI in U-mode causes an illegal
+When S-mode is implemented, then executing WFI or WFMI in U-mode causes an illegal
 instruction exception, unless it completes within an implementation-specific,
 bounded time limit.  A future revision of this specification might add
-a feature that allows S-mode to selectively permit WFI in U-mode.  Such
+a feature that allows S-mode to selectively permit WF[M]I in U-mode.  Such
 a feature would only be active when TW=0.
 
 The TSR (Trap SRET) bit is a \warl\ field that
@@ -2550,6 +2550,48 @@ extensions that wait on memory locations changing, or message
 arrival.
 \end{commentary}
 
+\subsection{Wait for My Interrupts}
+\label{wfi}
+
+The Wait for My Interrupts instruction (WFMI) is defined the same as the
+WFI instruction, with one difference: if an interrupt delegated to a mode
+less privileged than the current mode becomes pending, WFMI is permitted
+to continue stalling the hart.
+
+\begin{commentary}
+Because WFI and WFMI are permitted to complete at any time, WFMI may be
+implemented as WFI.
+\end{commentary}
+
+\begin{commentary}
+WFMI is encoded similarly to WFI, but with instruction bits 29:28, which
+ordinarily denote the minimum privilege for system instructions, set to 0.
+Hence, it is more convenient to avail WFMI to U-mode than it is WFI, and so
+some implementations might unconditionally trap WFI in U-mode while permitting
+WFMI.
+\end{commentary}
+
+\vspace{-0.2in}
+\begin{center}
+\begin{tabular}{M@{}R@{}F@{}R@{}S}
+\\
+\instbitrange{31}{20} &
+\instbitrange{19}{15} &
+\instbitrange{14}{12} &
+\instbitrange{11}{7} &
+\instbitrange{6}{0} \\
+\hline
+\multicolumn{1}{|c|}{funct12} &
+\multicolumn{1}{c|}{rs1} &
+\multicolumn{1}{c|}{funct3} &
+\multicolumn{1}{c|}{rd} &
+\multicolumn{1}{c|}{opcode} \\
+\hline
+12 & 5 & 3 & 5 & 7 \\
+WFMI  & 0 & PRIV & 0 & SYSTEM \\
+\end{tabular}
+\end{center}
+
 \section{Reset}
 \label{sec:reset}
 
diff --git a/src/priv-instr-table.tex b/src/priv-instr-table.tex
index 5603d7b..ca9c82b 100644
--- a/src/priv-instr-table.tex
+++ b/src/priv-instr-table.tex
@@ -94,6 +94,16 @@
   
 
 &
+\multicolumn{4}{|c|}{0000000} &
+\multicolumn{2}{c|}{00101} &
+\multicolumn{1}{c|}{00000} &
+\multicolumn{1}{c|}{000} &
+\multicolumn{1}{c|}{00000} &
+\multicolumn{1}{c|}{1110011} & WFMI \\
+\cline{2-11}
+  
+
+&
 \multicolumn{10}{c}{} & \\
 &
 \multicolumn{10}{c}{\bf Supervisor Memory-Management Instructions} & \\