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authorBeeman Strong <97133824+bcstrongx@users.noreply.github.com>2024-05-07 16:45:30 -0700
committerGitHub <noreply@github.com>2024-05-07 16:45:30 -0700
commit7b8ddc9f58b858265525b59f45bfca961f805b6b (patch)
treecba29b8aaf80b21b60c3f0b95011988c067f3d38
parent2d1a43e653400c139de7a77b7c4c13e13b83bd26 (diff)
downloadriscv-isa-manual-riscv-isa-release-7b8ddc9-2024-05-07.zip
riscv-isa-manual-riscv-isa-release-7b8ddc9-2024-05-07.tar.gz
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remove references to smcofpmf, which doesn't exist (#1387)riscv-isa-release-7b8ddc9-2024-05-07
-rw-r--r--src/smcdeleg.adoc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/smcdeleg.adoc b/src/smcdeleg.adoc
index e2164cd..0530f56 100644
--- a/src/smcdeleg.adoc
+++ b/src/smcdeleg.adoc
@@ -135,11 +135,11 @@ or VU-mode raise a virtual instruction exception.
=== Virtualizing Local Counter Overflow Interrupts
-For implementations that support Smcdeleg, Smcofpmf, and Smaia, the
+For implementations that support Smcdeleg, Sscofpmf, and Smaia, the
local counter overflow interrupt (LCOFI) bit (bit 13) in each of CSRs
`mvip` and `mvien` is implemented and writable.
-For implementations that support Smcdeleg/Ssccfg, Smcofpmf/Sscofpmf,
+For implementations that support Smcdeleg/Ssccfg, Sscofpmf,
Smaia/Ssaia, and the H extension, the LCOFI bit (bit 13) in each of `hvip`
and `hvien` is implemented and writable.