More LR/SC feedback

1 files changed, 5 insertions, 4 deletions

diff --git a/src/a.tex b/src/a.tex
index 1cc587f..76a78a4 100644
--- a/src/a.tex
+++ b/src/a.tex
@@ -267,8 +267,10 @@ the following properties:
 \item The code to retry a failing LR/SC sequence can contain backwards jumps
   and/or branches to repeat the LR/SC sequence, but otherwise has the same
   constraint as the code between the LR and SC.
-\item The LR address must lie either within a main memory region or within some
-  other memory region specified by the execution environment.
+\item The LR address must lie within a memory region with the {\em LR/SC
+  eventuality} property.  Main memory regions have this property.  The
+  execution environment may specify additional memory regions that have
+  this property.
 \item The SC must be to the same virtual address and of the same data size as
   the latest LR executed by the same hart.
 \end{itemize}
@@ -308,8 +310,7 @@ must guarantee that one of the following events eventually occurs:
   the reservation set of the LR instruction in {\em H}'s constrained LR/SC
   loop, or some other device in the system writes to that reservation set.
 \item {\em H} executes a branch or jump that exits the constrained LR/SC loop.
-\item {\em H} executes an instruction that raises a synchronous exception.
-\item {\em H} takes an interrupt.
+\item {\em H} takes a trap.
 \end{itemize}
 
 \begin{commentary}