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| author | Andrew Waterman <andrew@sifive.com> | 2021-06-12 01:40:09 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-06-12 01:40:09 -0700 |
| commit | 98f3349c64a134068f462272f8d85f71bbe42b61 (patch) | |
| tree | 8734f71746113cfd24701f1a190aa3c6403e0d47 | |
| parent | 276a6f0514243ac37c589d9ae584fdbc8b9d42bf (diff) | |
| download | riscv-isa-manual-98f3349c64a134068f462272f8d85f71bbe42b61.zip riscv-isa-manual-98f3349c64a134068f462272f8d85f71bbe42b61.tar.gz riscv-isa-manual-98f3349c64a134068f462272f8d85f71bbe42b61.tar.bz2 | |
Remove concept of hard reset from normative text
Resolves #662
| -rw-r--r-- | src/machine.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/machine.tex b/src/machine.tex index cdfc56c..34ae1d5 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -2569,7 +2569,7 @@ The {\tt mcause} values after reset have implementation-specific interpretation, but the value 0 should be returned on implementations that do not distinguish different reset conditions. Implementations that distinguish different reset conditions should only use 0 to -indicate the most complete reset (e.g., hard reset). +indicate the most complete reset. \begin{commentary} Some designs may have multiple causes of reset (e.g., power-on reset, |