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| author | Andrew Waterman <andrew@sifive.com> | 2021-09-14 16:52:44 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-09-14 16:52:44 -0700 |
| commit | 7d43cefd17b4fde0f542125bd33d611061ed5245 (patch) | |
| tree | 4c074b330f21cfea5934643ac58bae67175be890 | |
| parent | f864c377eb9d576f66d1c641bb389623033f7c9a (diff) | |
| download | riscv-isa-manual-7d43cefd17b4fde0f542125bd33d611061ed5245.zip riscv-isa-manual-7d43cefd17b4fde0f542125bd33d611061ed5245.tar.gz riscv-isa-manual-7d43cefd17b4fde0f542125bd33d611061ed5245.tar.bz2 | |
Clarify that WARL fields contain legal values after reset (#734)
| -rw-r--r-- | src/machine.tex | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/machine.tex b/src/machine.tex index fece762..430b6fc 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -2817,6 +2817,7 @@ reset vector. The {\tt mcause} register is set to a value indicating the cause of the reset. Writable PMP registers' A and L fields are set to 0, unless the platform mandates a different reset value for some PMP registers' A and L fields. +No \warl\ field contains an illegal value. All other hart state is \unspecified. The {\tt mcause} values after reset have implementation-specific |