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| author | Andrew Waterman <andrew@sifive.com> | 2019-07-12 12:01:04 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-07-12 12:01:04 -0700 |
| commit | 3e1e489798d62a57ba970c155ccf74a6a1ff890a (patch) | |
| tree | cdbfe804126b0294254d5f7ee3016bb72dbe5814 | |
| parent | 5960072e57140d9a56446e837d59fd5bf484434d (diff) | |
| download | riscv-isa-manual-3e1e489798d62a57ba970c155ccf74a6a1ff890a.zip riscv-isa-manual-3e1e489798d62a57ba970c155ccf74a6a1ff890a.tar.gz riscv-isa-manual-3e1e489798d62a57ba970c155ccf74a6a1ff890a.tar.bz2 | |
Improve description of mtimecmp code sequence
| -rw-r--r-- | src/machine.tex | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/machine.tex b/src/machine.tex index 6a9d922..08240c6 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -1670,7 +1670,9 @@ to the intermediate value of the comparand: \end{center} \caption{Sample code for setting the 64-bit time comparand in RV32, assuming a little-endian memory system and that the registers live in a strongly - ordered I/O region.} + ordered I/O region. Storing -1 to the low-order bits of {\tt mtimecmp} + prevents {\tt mtimecmp} from temporarily becoming smaller than the lesser + of the old and new values.} \label{mtimecmph} \end{figure} |