diff options
| -rw-r--r-- | encoding.h | 41 | ||||
| -rw-r--r-- | p/riscv_test.h | 9 |
2 files changed, 43 insertions, 7 deletions
@@ -61,8 +61,11 @@ #define IRQ_S_TIMER 5 #define IRQ_H_TIMER 6 #define IRQ_M_TIMER 7 -#define IRQ_COP 8 -#define IRQ_HOST 9 +#define IRQ_S_DEV 9 +#define IRQ_H_DEV 10 +#define IRQ_M_DEV 11 +#define IRQ_COP 12 +#define IRQ_HOST 13 #define DEFAULT_RSTVEC 0x0 #define DEFAULT_NMIVEC 0x4 @@ -647,6 +650,9 @@ #define CSR_SIP 0x144 #define CSR_SPTBR 0x180 #define CSR_SASID 0x181 +#define CSR_SCYCLE 0xd00 +#define CSR_STIME 0xd01 +#define CSR_SINSTRET 0xd02 #define CSR_MSTATUS 0x300 #define CSR_MEDELEG 0x302 #define CSR_MIDELEG 0x303 @@ -659,6 +665,14 @@ #define CSR_MBADADDR 0x343 #define CSR_MIP 0x344 #define CSR_MIPI 0x345 +#define CSR_MUCOUNTEREN 0x310 +#define CSR_MSCOUNTEREN 0x311 +#define CSR_MUCYCLE_DELTA 0x700 +#define CSR_MUTIME_DELTA 0x701 +#define CSR_MUINSTRET_DELTA 0x702 +#define CSR_MSCYCLE_DELTA 0x704 +#define CSR_MSTIME_DELTA 0x705 +#define CSR_MSINSTRET_DELTA 0x706 #define CSR_MCYCLE 0xf00 #define CSR_MTIME 0xf01 #define CSR_MINSTRET 0xf02 @@ -675,6 +689,12 @@ #define CSR_TIMEH 0xc81 #define CSR_INSTRETH 0xc82 #define CSR_MTIMECMPH 0x361 +#define CSR_MUCYCLE_DELTAH 0x780 +#define CSR_MUTIME_DELTAH 0x781 +#define CSR_MUINSTRET_DELTAH 0x782 +#define CSR_MSCYCLE_DELTAH 0x784 +#define CSR_MSTIME_DELTAH 0x785 +#define CSR_MSINSTRET_DELTAH 0x786 #define CSR_MCYCLEH 0xf80 #define CSR_MTIMEH 0xf81 #define CSR_MINSTRETH 0xf82 @@ -952,6 +972,9 @@ DECLARE_CSR(sbadaddr, CSR_SBADADDR) DECLARE_CSR(sip, CSR_SIP) DECLARE_CSR(sptbr, CSR_SPTBR) DECLARE_CSR(sasid, CSR_SASID) +DECLARE_CSR(scycle, CSR_SCYCLE) +DECLARE_CSR(stime, CSR_STIME) +DECLARE_CSR(sinstret, CSR_SINSTRET) DECLARE_CSR(mstatus, CSR_MSTATUS) DECLARE_CSR(medeleg, CSR_MEDELEG) DECLARE_CSR(mideleg, CSR_MIDELEG) @@ -964,6 +987,14 @@ DECLARE_CSR(mcause, CSR_MCAUSE) DECLARE_CSR(mbadaddr, CSR_MBADADDR) DECLARE_CSR(mip, CSR_MIP) DECLARE_CSR(mipi, CSR_MIPI) +DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN) +DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN) +DECLARE_CSR(mucycle_delta, CSR_MUCYCLE_DELTA) +DECLARE_CSR(mutime_delta, CSR_MUTIME_DELTA) +DECLARE_CSR(muinstret_delta, CSR_MUINSTRET_DELTA) +DECLARE_CSR(mscycle_delta, CSR_MSCYCLE_DELTA) +DECLARE_CSR(mstime_delta, CSR_MSTIME_DELTA) +DECLARE_CSR(msinstret_delta, CSR_MSINSTRET_DELTA) DECLARE_CSR(mcycle, CSR_MCYCLE) DECLARE_CSR(mtime, CSR_MTIME) DECLARE_CSR(minstret, CSR_MINSTRET) @@ -980,6 +1011,12 @@ DECLARE_CSR(cycleh, CSR_CYCLEH) DECLARE_CSR(timeh, CSR_TIMEH) DECLARE_CSR(instreth, CSR_INSTRETH) DECLARE_CSR(mtimecmph, CSR_MTIMECMPH) +DECLARE_CSR(mucycle_deltah, CSR_MUCYCLE_DELTAH) +DECLARE_CSR(mutime_deltah, CSR_MUTIME_DELTAH) +DECLARE_CSR(muinstret_deltah, CSR_MUINSTRET_DELTAH) +DECLARE_CSR(mscycle_deltah, CSR_MSCYCLE_DELTAH) +DECLARE_CSR(mstime_deltah, CSR_MSTIME_DELTAH) +DECLARE_CSR(msinstret_deltah, CSR_MSINSTRET_DELTAH) DECLARE_CSR(mcycleh, CSR_MCYCLEH) DECLARE_CSR(mtimeh, CSR_MTIMEH) DECLARE_CSR(minstreth, CSR_MINSTRETH) diff --git a/p/riscv_test.h b/p/riscv_test.h index c4df61e..cdc256e 100644 --- a/p/riscv_test.h +++ b/p/riscv_test.h @@ -121,16 +121,15 @@ reset_vector: \ la t0, stvec_handler; \ beqz t0, 1f; \ csrw stvec, t0; \ - li t0, (1 << CAUSE_MISALIGNED_LOAD) | \ - (1 << CAUSE_MISALIGNED_STORE) | \ - (1 << CAUSE_MISALIGNED_FETCH) | \ - (1 << CAUSE_FAULT_LOAD) | \ + li t0, (1 << CAUSE_FAULT_LOAD) | \ (1 << CAUSE_FAULT_STORE) | \ (1 << CAUSE_FAULT_FETCH) | \ - (1 << CAUSE_ILLEGAL_INSTRUCTION) | \ + (1 << CAUSE_MISALIGNED_FETCH) | \ (1 << CAUSE_USER_ECALL) | \ (1 << CAUSE_BREAKPOINT); \ csrw medeleg, t0; \ + csrr t1, medeleg; \ + bne t0, t1, other_exception; \ 1: csrwi mstatus, 0; \ init; \ EXTRA_INIT; \ |