Merge [shm]call into ecall, [shm]ret into eret

5 files changed, 25 insertions, 36 deletions

diff --git a/encoding.h b/encoding.h
index 354e67d..cf8b2a2 100644
--- a/encoding.h
+++ b/encoding.h
@@ -150,14 +150,10 @@
 #define MASK_AMOMAX_D  0xf800707f
 #define MATCH_BLTU 0x6063
 #define MASK_BLTU  0x707f
-#define MATCH_FCLASS_S 0xe0001053
-#define MASK_FCLASS_S  0xfff0707f
 #define MATCH_FSGNJN_D 0x22001053
 #define MASK_FSGNJN_D  0xfe00707f
-#define MATCH_HCALL 0x10000073
-#define MASK_HCALL  0xffffffff
-#define MATCH_MRET 0x30200073
-#define MASK_MRET  0xffffffff
+#define MATCH_FMIN_S 0x28000053
+#define MASK_FMIN_S  0xfe00707f
 #define MATCH_CSRRW 0x1073
 #define MASK_CSRRW  0x707f
 #define MATCH_SLLIW 0x101b
@@ -244,9 +240,9 @@
 #define MASK_BLT  0x707f
 #define MATCH_SCALL 0x73
 #define MASK_SCALL  0xffffffff
-#define MATCH_FMIN_S 0x28000053
-#define MASK_FMIN_S  0xfe00707f
-#define MATCH_SFENCE_VM 0x10400073
+#define MATCH_FCLASS_S 0xe0001053
+#define MASK_FCLASS_S  0xfff0707f
+#define MATCH_SFENCE_VM 0x10100073
 #define MASK_SFENCE_VM  0xfff07fff
 #define MATCH_SC_W 0x1800202f
 #define MASK_SC_W  0xf800707f
@@ -264,8 +260,6 @@
 #define MASK_MULH  0xfe00707f
 #define MATCH_FMUL_S 0x10000053
 #define MASK_FMUL_S  0xfe00007f
-#define MATCH_MCALL 0x20000073
-#define MASK_MCALL  0xffffffff
 #define MATCH_CSRRSI 0x6073
 #define MASK_CSRRSI  0x707f
 #define MATCH_SRAI 0x40005013
@@ -306,7 +300,7 @@
 #define MASK_FSUB_D  0xfe00007f
 #define MATCH_FSGNJX_S 0x20002053
 #define MASK_FSGNJX_S  0xfe00707f
-#define MATCH_MRTS 0x30900073
+#define MATCH_MRTS 0x30500073
 #define MASK_MRTS  0xffffffff
 #define MATCH_FEQ_D 0xa2002053
 #define MASK_FEQ_D  0xfe00707f
@@ -334,7 +328,7 @@
 #define MASK_ANDI  0x707f
 #define MATCH_FMV_X_S 0xe0000053
 #define MASK_FMV_X_S  0xfff0707f
-#define MATCH_SRET 0x10200073
+#define MATCH_SRET 0x10000073
 #define MASK_SRET  0xffffffff
 #define MATCH_FNMADD_S 0x4f
 #define MASK_FNMADD_S  0x600007f
@@ -516,14 +510,12 @@
 #define CAUSE_MISALIGNED_FETCH 0x0
 #define CAUSE_FAULT_FETCH 0x1
 #define CAUSE_ILLEGAL_INSTRUCTION 0x2
-#define CAUSE_SCALL 0x4
-#define CAUSE_HCALL 0x5
-#define CAUSE_MCALL 0x6
-#define CAUSE_BREAKPOINT 0x7
-#define CAUSE_MISALIGNED_LOAD 0x8
-#define CAUSE_FAULT_LOAD 0x9
-#define CAUSE_MISALIGNED_STORE 0xa
-#define CAUSE_FAULT_STORE 0xb
+#define CAUSE_MISALIGNED_LOAD 0x4
+#define CAUSE_FAULT_LOAD 0x5
+#define CAUSE_MISALIGNED_STORE 0x6
+#define CAUSE_FAULT_STORE 0x7
+#define CAUSE_ECALL 0x8
+#define CAUSE_BREAKPOINT 0x9
 #endif
 #ifdef DECLARE_INSN
 DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
@@ -532,10 +524,8 @@ DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
 DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
 DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
 DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
-DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
 DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
-DECLARE_INSN(hcall, MATCH_HCALL, MASK_HCALL)
-DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
+DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
 DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
 DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
 DECLARE_INSN(lb, MATCH_LB, MASK_LB)
@@ -579,7 +569,7 @@ DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
 DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
 DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
 DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL)
-DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
+DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
 DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
 DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
 DECLARE_INSN(rem, MATCH_REM, MASK_REM)
@@ -589,7 +579,6 @@ DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
 DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
 DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
 DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
-DECLARE_INSN(mcall, MATCH_MCALL, MASK_MCALL)
 DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
 DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
 DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
diff --git a/p/riscv_test.h b/p/riscv_test.h
index bea9b3a..4efb6fc 100644
--- a/p/riscv_test.h
+++ b/p/riscv_test.h
@@ -121,7 +121,7 @@
         .align  6;                                                      \
 tvec_user:                                                              \
         EXTRA_TVEC_USER;                                                \
-        la t5, hcall;                                                   \
+        la t5, ecall;                                                   \
         csrr t6, mepc;                                                  \
         beq t5, t6, write_tohost;                                       \
         li t5, 0xbadbad0;                                               \
@@ -145,7 +145,7 @@ tvec_hypervisor:                                                        \
 tvec_machine:                                                           \
         EXTRA_TVEC_MACHINE;                                             \
         .weak mtvec;                                                    \
-        la t5, hcall;                                                   \
+        la t5, ecall;                                                   \
         csrr t6, mepc;                                                  \
         beq t5, t6, write_tohost;                                       \
         la t5, mtvec;                                                   \
@@ -163,7 +163,7 @@ _start:                                                                 \
         la t0, 1f;                                                      \
         csrw mepc, t0;                                                  \
         csrr a0, hartid;                                                \
-        mret;                                                           \
+        eret;                                                           \
 1:
 
 //-----------------------------------------------------------------------
@@ -171,8 +171,8 @@ _start:                                                                 \
 //-----------------------------------------------------------------------
 
 #define RVTEST_CODE_END                                                 \
-hcall:  hcall;                                                          \
-        j hcall
+ecall:  ecall;                                                          \
+        j ecall
 
 //-----------------------------------------------------------------------
 // Pass/Fail Macro
@@ -181,7 +181,7 @@ hcall:  hcall;                                                          \
 #define RVTEST_PASS                                                     \
         fence;                                                          \
         li TESTNUM, 1;                                                  \
-        j hcall
+        j ecall
 
 #define TESTNUM x28
 #define RVTEST_FAIL                                                     \
@@ -189,7 +189,7 @@ hcall:  hcall;                                                          \
 1:      beqz TESTNUM, 1b;                                               \
         sll TESTNUM, TESTNUM, 1;                                        \
         or TESTNUM, TESTNUM, 1;                                         \
-        j hcall
+        j ecall
 
 //-----------------------------------------------------------------------
 // Data Section Macro
diff --git a/pt/riscv_test.h b/pt/riscv_test.h
index cdca2cf..84b2d51 100644
--- a/pt/riscv_test.h
+++ b/pt/riscv_test.h
@@ -46,7 +46,7 @@ _skip_vector_restore:                                                   \
         addi a0, a0, TIMER_INTERVAL;                                    \
         csrw stimecmp, a0;                                              \
         csrr a0, mscratch;                                              \
-        mret;                                                           \
+        eret;                                                           \
 
 #ifdef __riscv64
 
diff --git a/v/entry.S b/v/entry.S
index c3c884d..d0dcfc3 100644
--- a/v/entry.S
+++ b/v/entry.S
@@ -73,7 +73,7 @@ pop_tf:
   LOAD  x30,30*REGBYTES(a0)
   LOAD  x31,31*REGBYTES(a0)
   LOAD  a0,10*REGBYTES(a0)
-  mret
+  eret
 
   .global  trap_entry
 trap_entry:
diff --git a/v/vm.c b/v/vm.c
index 7880b88..67920e5 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -160,7 +160,7 @@ static void restore_vector(trapframe_t* tf)
 
 void handle_trap(trapframe_t* tf)
 {
-  if (tf->cause == CAUSE_SCALL)
+  if (tf->cause == CAUSE_ECALL)
   {
     int n = tf->gpr[10];