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AgeCommit message (Expand)AuthorFilesLines
2015-09-20Remove Hwacha v3 testsAndrew Waterman88-36345/+4
2015-09-20Add another FP recoding test caseAndrew Waterman1-6/+20
2015-09-16Add test for FP recoding corner casesAndrew Waterman2-1/+37
2015-08-03Use medany code model, not PIC, for ISA testsAndrew Waterman1-1/+1
2015-07-06Coherence torture test for VM testsAndrew Waterman1-2/+3
2015-07-05New M-mode timersAndrew Waterman6-1143/+1097
2015-05-19Add basic WFI testAndrew Waterman4-0/+51
2015-05-09Update to privileged architecture version 1.7Andrew Waterman7-16/+55
2015-04-13Correct expected high value of multiplicationJoakim Andersson2-8/+7
2015-04-12Better coverage of mul high instructionsJoakim Andersson4-0/+31
2015-04-03Run RV32 tests on spike with --isa=RV32Andrew Waterman5-6/+14
2015-03-27New virtual memory implementation (Sv39)Andrew Waterman1-4/+4
2015-03-25split out S-mode tests and M-mode testsYunsup Lee42-97/+278
2015-03-24Don't assume PRV1/2 and IE1/2 are resetAndrew Waterman1-1/+1
2015-03-21Merge rv64si and rv32si testsAndrew Waterman14-286/+324
2015-03-20Add fdiv testAndrew Waterman3-5/+48
2015-03-17relay hwacha cause/aux to scause/sbadaddrYunsup Lee11-24/+24
2015-03-17Merge [shm]call into ecall, [shm]ret into eretAndrew Waterman3-3/+3
2015-03-16revamp vector tests with new privileged spec, and add scalar pt testsYunsup Lee18-160/+56
2015-03-14Add PTE dirty bit testAndrew Waterman2-0/+85
2015-03-12Update to new privileged specAndrew Waterman20-186/+129
2015-02-23Added more +/- NaN/inf tests for fcvt.{w/l/wu/lu}.{s/d}Christopher Celio1-8/+43
2015-02-22Added -NaN test for fcvt.{w/h}.sChristopher Celio1-0/+19
2015-02-19Unify rv32/rv64 timer testsAndrew Waterman2-43/+10
2015-02-15Make rv64uf-p-ldst test the sign bit, tooAndrew Waterman1-4/+10
2015-01-09Add LICENSEAndrew Waterman255-0/+510
2015-01-04Avoid deprecated "b" pseudo-op; use "j" insteadAndrew Waterman4-9/+9
2015-01-02On misaligned fetch, EPC = branch target, not sourceAndrew Waterman1-5/+8
2014-12-03Use new toolchain and calling conventionAndrew Waterman1-2/+3
2014-12-03Rely on assembler to relax far branchesAndrew Waterman1-12/+3
2014-12-03Make timer test more thoroughAndrew Waterman1-12/+1043
2014-11-22relax rv32si timer test a bitYunsup Lee1-1/+2
2014-11-13remove zscale specific testsYunsup Lee4-192/+0
2014-11-13enable make subsetsYunsup Lee1-7/+16
2014-11-13make rv32si fault load/store test strongerYunsup Lee1-1/+5
2014-11-12beef up rv32si testsYunsup Lee11-0/+547
2014-11-06Fix build with riscv-gcc version 4.9Andrew Waterman1-1/+1
2014-11-06Don't access memory outside of the binary's rangeAndrew Waterman26-1/+27
2014-08-28Added "simple" test to rv32ui.Christopher Celio2-0/+26
2014-05-07Add timer interrupt testAndrew Waterman3-4/+66
2014-04-18Added a new test case to REMW.Christopher Celio1-0/+1
2014-04-08Adjust hwacha misaligned instruction test to ignore lower 2 bits in compariso...Stephen Twigg1-0/+2
2014-03-18Check FP corner cases and flagsAndrew Waterman7-183/+210
2014-03-06Add fclass.{s|d} testAndrew Waterman2-1/+58
2014-03-02add vfmsv.{s,d} testsYunsup Lee3-5/+60
2014-02-27add keepcfg testYunsup Lee2-1/+84
2014-02-26test to see whether vector unit is able to take 2 fmas in parallelYunsup Lee2-1/+181
2014-02-10Revert to old AUIPC definitionAndrew Waterman3-21/+13
2014-02-03Add vfmsv instruction test, change vsetprec to vsetucfgQuan Nguyen3-2/+58
2014-01-31Shrink hex dumpsAndrew Waterman27-28/+2
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