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-rw-r--r--isa/rv32uzbs/Makefrag15
-rw-r--r--isa/rv32uzbs/bclr.S7
-rw-r--r--isa/rv32uzbs/bclri.S7
-rw-r--r--isa/rv32uzbs/bext.S7
-rw-r--r--isa/rv32uzbs/bexti.S7
-rw-r--r--isa/rv32uzbs/binv.S7
-rw-r--r--isa/rv32uzbs/binvi.S7
-rw-r--r--isa/rv32uzbs/bset.S7
-rw-r--r--isa/rv32uzbs/bseti.S7
9 files changed, 71 insertions, 0 deletions
diff --git a/isa/rv32uzbs/Makefrag b/isa/rv32uzbs/Makefrag
new file mode 100644
index 0000000..7af7c42
--- /dev/null
+++ b/isa/rv32uzbs/Makefrag
@@ -0,0 +1,15 @@
+#=======================================================================
+# Makefrag for rv32uzbs tests
+#-----------------------------------------------------------------------
+
+rv32uzbs_sc_tests = \
+ bclr bclri \
+ bext bexti \
+ binv binvi \
+ bset bseti \
+
+rv32uzbs_p_tests = $(addprefix rv32uzbs-p-, $(rv32uzbs_sc_tests))
+rv32uzbs_v_tests = $(addprefix rv32uzbs-v-, $(rv32uzbs_sc_tests))
+rv32uzbs_ps_tests = $(addprefix rv32uzbs-ps-, $(rv32uzbs_sc_tests))
+
+spike_tests += $(rv32uzbs_p_tests) $(rv32uzbs_v_tests)
diff --git a/isa/rv32uzbs/bclr.S b/isa/rv32uzbs/bclr.S
new file mode 100644
index 0000000..10f7e50
--- /dev/null
+++ b/isa/rv32uzbs/bclr.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bclr.S"
diff --git a/isa/rv32uzbs/bclri.S b/isa/rv32uzbs/bclri.S
new file mode 100644
index 0000000..2f709d8
--- /dev/null
+++ b/isa/rv32uzbs/bclri.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bclri.S"
diff --git a/isa/rv32uzbs/bext.S b/isa/rv32uzbs/bext.S
new file mode 100644
index 0000000..0f838e5
--- /dev/null
+++ b/isa/rv32uzbs/bext.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bext.S"
diff --git a/isa/rv32uzbs/bexti.S b/isa/rv32uzbs/bexti.S
new file mode 100644
index 0000000..91ee2d6
--- /dev/null
+++ b/isa/rv32uzbs/bexti.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bexti.S"
diff --git a/isa/rv32uzbs/binv.S b/isa/rv32uzbs/binv.S
new file mode 100644
index 0000000..55ea39b
--- /dev/null
+++ b/isa/rv32uzbs/binv.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/binv.S"
diff --git a/isa/rv32uzbs/binvi.S b/isa/rv32uzbs/binvi.S
new file mode 100644
index 0000000..5874363
--- /dev/null
+++ b/isa/rv32uzbs/binvi.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/binvi.S"
diff --git a/isa/rv32uzbs/bset.S b/isa/rv32uzbs/bset.S
new file mode 100644
index 0000000..4220823
--- /dev/null
+++ b/isa/rv32uzbs/bset.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bset.S"
diff --git a/isa/rv32uzbs/bseti.S b/isa/rv32uzbs/bseti.S
new file mode 100644
index 0000000..4a6179e
--- /dev/null
+++ b/isa/rv32uzbs/bseti.S
@@ -0,0 +1,7 @@
+# See LICENSE for license details.
+
+#include "riscv_test.h"
+#undef RVTEST_RV64U
+#define RVTEST_RV64U RVTEST_RV32U
+
+#include "../rv64uzbs/bseti.S"