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-rw-r--r--debug/targets/RISC-V/spike32-2.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/debug/targets/RISC-V/spike32-2.py b/debug/targets/RISC-V/spike32-2.py
index ca62610..6a5a839 100644
--- a/debug/targets/RISC-V/spike32-2.py
+++ b/debug/targets/RISC-V/spike32-2.py
@@ -12,4 +12,5 @@ class spike32_2(targets.Target):
def create(self):
return testlib.Spike(self, isa="RV32IMAFC", progbufsize=0, dmi_rti=4,
- support_abstract_csr=True, support_haltgroups=False)
+ support_abstract_csr=True, support_abstract_fpr=True,
+ support_haltgroups=False)