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author | Colin Schmidt <colins@eecs.berkeley.edu> | 2016-02-29 10:00:15 -0800 |
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committer | Colin Schmidt <colins@eecs.berkeley.edu> | 2016-02-29 10:54:27 -0800 |
commit | af7bcec998b72b2b91180c83b45151201fa1c150 (patch) | |
tree | e632d433c598b38499df4e299b893800ad00e428 /isa/rv64um/divuw.S | |
parent | 9e63c8544ea2e0aea6778defb7b535dbb87b7205 (diff) | |
download | riscv-tests-travis-dev.zip riscv-tests-travis-dev.tar.gz riscv-tests-travis-dev.tar.bz2 |
Separate M, and A from I. Allow disabling of M,A,Ftravis-dev
This allows riscv-tests to be built with a compiler
that supports not just RVG.
Diffstat (limited to 'isa/rv64um/divuw.S')
-rw-r--r-- | isa/rv64um/divuw.S | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/isa/rv64um/divuw.S b/isa/rv64um/divuw.S new file mode 100644 index 0000000..4c9eee7 --- /dev/null +++ b/isa/rv64um/divuw.S @@ -0,0 +1,41 @@ +# See LICENSE for license details. + +#***************************************************************************** +# divuw.S +#----------------------------------------------------------------------------- +# +# Test divuw instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, divuw, 3, 20, 6 ); + TEST_RR_OP( 3, divuw, 715827879, -20 << 32 >> 32, 6 ); + TEST_RR_OP( 4, divuw, 0, 20, -6 ); + TEST_RR_OP( 5, divuw, 0, -20, -6 ); + + TEST_RR_OP( 6, divuw, -1<<31, -1<<31, 1 ); + TEST_RR_OP( 7, divuw, 0, -1<<31, -1 ); + + TEST_RR_OP( 8, divuw, -1, -1<<31, 0 ); + TEST_RR_OP( 9, divuw, -1, 1, 0 ); + TEST_RR_OP(10, divuw, -1, 0, 0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END |