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authorHoward Mao <zhehao.mao@gmail.com>2016-06-22 15:53:38 -0700
committerHoward Mao <zhehao.mao@gmail.com>2016-06-22 15:53:38 -0700
commit51671844c2588386ce3eacedf40d385e3c2b1484 (patch)
tree3ad4c759cb0b4c9712a95d11f99a6241877a169e /isa/rv64ui
parentb6b5e81217c1f2a70ecb6883b1756859cd7bb999 (diff)
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separate ua and um tests from ui testssplit-isa-tests
Diffstat (limited to 'isa/rv64ui')
-rw-r--r--isa/rv64ui/Makefrag6
-rw-r--r--isa/rv64ui/amoadd_d.S64
-rw-r--r--isa/rv64ui/amoadd_w.S65
-rw-r--r--isa/rv64ui/amoand_d.S65
-rw-r--r--isa/rv64ui/amoand_w.S65
-rw-r--r--isa/rv64ui/amomax_d.S49
-rw-r--r--isa/rv64ui/amomax_w.S49
-rw-r--r--isa/rv64ui/amomaxu_d.S49
-rw-r--r--isa/rv64ui/amomaxu_w.S49
-rw-r--r--isa/rv64ui/amomin_d.S49
-rw-r--r--isa/rv64ui/amomin_w.S49
-rw-r--r--isa/rv64ui/amominu_d.S49
-rw-r--r--isa/rv64ui/amominu_w.S49
-rw-r--r--isa/rv64ui/amoor_d.S65
-rw-r--r--isa/rv64ui/amoor_w.S65
-rw-r--r--isa/rv64ui/amoswap_d.S65
-rw-r--r--isa/rv64ui/amoswap_w.S65
-rw-r--r--isa/rv64ui/amoxor_d.S65
-rw-r--r--isa/rv64ui/amoxor_w.S65
-rw-r--r--isa/rv64ui/div.S41
-rw-r--r--isa/rv64ui/divu.S41
-rw-r--r--isa/rv64ui/divuw.S41
-rw-r--r--isa/rv64ui/divw.S41
-rw-r--r--isa/rv64ui/lrsc.S84
-rw-r--r--isa/rv64ui/mul.S78
-rw-r--r--isa/rv64ui/mulh.S72
-rw-r--r--isa/rv64ui/mulhsu.S72
-rw-r--r--isa/rv64ui/mulhu.S75
-rw-r--r--isa/rv64ui/mulw.S72
-rw-r--r--isa/rv64ui/rem.S41
-rw-r--r--isa/rv64ui/remu.S41
-rw-r--r--isa/rv64ui/remuw.S41
-rw-r--r--isa/rv64ui/remw.S42
33 files changed, 0 insertions, 1829 deletions
diff --git a/isa/rv64ui/Makefrag b/isa/rv64ui/Makefrag
index 4af2504..7920b99 100644
--- a/isa/rv64ui/Makefrag
+++ b/isa/rv64ui/Makefrag
@@ -4,21 +4,15 @@
rv64ui_sc_tests = \
add addi addiw addw \
- amoadd_d amoand_d amomax_d amomaxu_d amomin_d amominu_d amoor_d amoxor_d amoswap_d \
- amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoxor_w amoswap_w \
- lrsc \
and andi \
auipc \
beq bge bgeu blt bltu bne \
- div divu divuw divw \
example simple \
fence_i \
j jal jalr \
lb lbu lh lhu lw lwu ld \
lui \
- mul mulh mulhsu mulhu mulw \
or ori \
- rem remu remuw remw \
sb sh sw sd \
sll slli slliw sllw \
slt slti sltiu sltu \
diff --git a/isa/rv64ui/amoadd_d.S b/isa/rv64ui/amoadd_d.S
deleted file mode 100644
index c356bed..0000000
--- a/isa/rv64ui/amoadd_d.S
+++ /dev/null
@@ -1,64 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoadd_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amoadd.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoadd.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff7ffff800, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xffffffff7ffff800, \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoadd.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffff7ffff000, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoadd_w.S b/isa/rv64ui/amoadd_w.S
deleted file mode 100644
index b3d1953..0000000
--- a/isa/rv64ui/amoadd_w.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoadd_w.S
-#-----------------------------------------------------------------------------
-#
-# Test amoadd.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoadd.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0x000000007ffff800, lw a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0x000000007ffff800, \
- li a1, 0xffffffff80000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- amoadd.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xfffffffffffff800, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoand_d.S b/isa/rv64ui/amoand_d.S
deleted file mode 100644
index 13019ae..0000000
--- a/isa/rv64ui/amoand_d.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoand_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amoand.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoand.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xffffffff80000000, \
- li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoand.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0x0000000080000000, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoand_w.S b/isa/rv64ui/amoand_w.S
deleted file mode 100644
index a843888..0000000
--- a/isa/rv64ui/amoand_w.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoand.w.S
-#-----------------------------------------------------------------------------
-#
-# Test amoand.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoand.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xffffffff80000000, \
- li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- amoand.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffff80000000, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomax_d.S b/isa/rv64ui/amomax_d.S
deleted file mode 100644
index ea7e2d3..0000000
--- a/isa/rv64ui/amomax_d.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomax_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomax.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- amomax.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, ld a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 1; \
- sd x0, 0(a3); \
- amomax.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 1, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomax_w.S b/isa/rv64ui/amomax_w.S
deleted file mode 100644
index b3adbf0..0000000
--- a/isa/rv64ui/amomax_w.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomax_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomax.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- amomax.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 1; \
- sw x0, 0(a3); \
- amomax.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 1, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomaxu_d.S b/isa/rv64ui/amomaxu_d.S
deleted file mode 100644
index b340873..0000000
--- a/isa/rv64ui/amomaxu_d.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomaxu_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomaxu.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- amomaxu.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, ld a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sd x0, 0(a3); \
- amomaxu.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffffffffffff, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomaxu_w.S b/isa/rv64ui/amomaxu_w.S
deleted file mode 100644
index 41346d1..0000000
--- a/isa/rv64ui/amomaxu_w.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomaxu_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomaxu.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- amomaxu.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sw x0, 0(a3); \
- amomaxu.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffffffffffff, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomin_d.S b/isa/rv64ui/amomin_d.S
deleted file mode 100644
index e6febbb..0000000
--- a/isa/rv64ui/amomin_d.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomin_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomin.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- amomin.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, ld a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sd x0, 0(a3); \
- amomin.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffffffffffff, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amomin_w.S b/isa/rv64ui/amomin_w.S
deleted file mode 100644
index 96b547b..0000000
--- a/isa/rv64ui/amomin_w.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amomin_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amomin.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- amomin.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sw x0, 0(a3); \
- amomin.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffffffffffff, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amominu_d.S b/isa/rv64ui/amominu_d.S
deleted file mode 100644
index a1013f3..0000000
--- a/isa/rv64ui/amominu_d.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amominu_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amominu.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- amominu.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, ld a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sd x0, 0(a3); \
- amominu.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amominu_w.S b/isa/rv64ui/amominu_w.S
deleted file mode 100644
index 0a9e265..0000000
--- a/isa/rv64ui/amominu_w.S
+++ /dev/null
@@ -1,49 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amominu_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amominu.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- amominu.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff80000000, lw a5, 0(a3))
-
- TEST_CASE(4, a4, 0, \
- li a1, 0xffffffffffffffff; \
- sw x0, 0(a3); \
- amominu.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoor_d.S b/isa/rv64ui/amoor_d.S
deleted file mode 100644
index 507e877..0000000
--- a/isa/rv64ui/amoor_d.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoor_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amoor.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoor.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xfffffffffffff800, \
- li a1, 1; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoor.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xfffffffffffff801, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoor_w.S b/isa/rv64ui/amoor_w.S
deleted file mode 100644
index 47978ba..0000000
--- a/isa/rv64ui/amoor_w.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoor.w.S
-#-----------------------------------------------------------------------------
-#
-# Test amoor.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoor.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xfffffffffffff800, \
- li a1, 1; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- amoor.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xfffffffffffff801, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoswap_d.S b/isa/rv64ui/amoswap_d.S
deleted file mode 100644
index 628f537..0000000
--- a/isa/rv64ui/amoswap_d.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoswap.d.S
-#-----------------------------------------------------------------------------
-#
-# Test amoswap.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoswap.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xfffffffffffff800, \
- li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoswap.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0x0000000080000000, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoswap_w.S b/isa/rv64ui/amoswap_w.S
deleted file mode 100644
index c09b866..0000000
--- a/isa/rv64ui/amoswap_w.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoswap_w.S
-#-----------------------------------------------------------------------------
-#
-# Test amoswap.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoswap.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xfffffffffffff800, lw a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0xfffffffffffff800, \
- li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- amoswap.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffff80000000, lw a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoxor_d.S b/isa/rv64ui/amoxor_d.S
deleted file mode 100644
index f446121..0000000
--- a/isa/rv64ui/amoxor_d.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoxor_d.S
-#-----------------------------------------------------------------------------
-#
-# Test amoxor.d instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoxor.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0x000000007ffff800, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0x000000007ffff800, \
- li a1, 1; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoxor.d a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0x000000007ffff801, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/amoxor_w.S b/isa/rv64ui/amoxor_w.S
deleted file mode 100644
index 2b92323..0000000
--- a/isa/rv64ui/amoxor_w.S
+++ /dev/null
@@ -1,65 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# amoxor_w.S
-#-----------------------------------------------------------------------------
-#
-# Test amoxor.w instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- TEST_CASE(2, a4, 0xffffffff80000000, \
- li a0, 0xffffffff80000000; \
- li a1, 0xfffffffffffff800; \
- la a3, amo_operand; \
- sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- amoxor.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(3, a5, 0xffffffff7ffff800, ld a5, 0(a3))
-
- # try again after a cache miss
- TEST_CASE(4, a4, 0x000000007ffff800, \
- li a1, 0xc0000001; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- amoxor.w a4, a1, 0(a3); \
- )
-
- TEST_CASE(5, a5, 0xffffffffbffff801, ld a5, 0(a3))
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
-
- .bss
- .align 3
-amo_operand:
- .dword 0
- .skip 65536
diff --git a/isa/rv64ui/div.S b/isa/rv64ui/div.S
deleted file mode 100644
index ee21f0c..0000000
--- a/isa/rv64ui/div.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# div.S
-#-----------------------------------------------------------------------------
-#
-# Test div instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, div, 3, 20, 6 );
- TEST_RR_OP( 3, div, -3, -20, 6 );
- TEST_RR_OP( 4, div, -3, 20, -6 );
- TEST_RR_OP( 5, div, 3, -20, -6 );
-
- TEST_RR_OP( 6, div, -1<<63, -1<<63, 1 );
- TEST_RR_OP( 7, div, -1<<63, -1<<63, -1 );
-
- TEST_RR_OP( 8, div, -1, -1<<63, 0 );
- TEST_RR_OP( 9, div, -1, 1, 0 );
- TEST_RR_OP(10, div, -1, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/divu.S b/isa/rv64ui/divu.S
deleted file mode 100644
index e63fd65..0000000
--- a/isa/rv64ui/divu.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# divu.S
-#-----------------------------------------------------------------------------
-#
-# Test divu instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, divu, 3, 20, 6 );
- TEST_RR_OP( 3, divu, 3074457345618258599, -20, 6 );
- TEST_RR_OP( 4, divu, 0, 20, -6 );
- TEST_RR_OP( 5, divu, 0, -20, -6 );
-
- TEST_RR_OP( 6, divu, -1<<63, -1<<63, 1 );
- TEST_RR_OP( 7, divu, 0, -1<<63, -1 );
-
- TEST_RR_OP( 8, divu, -1, -1<<63, 0 );
- TEST_RR_OP( 9, divu, -1, 1, 0 );
- TEST_RR_OP(10, divu, -1, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/divuw.S b/isa/rv64ui/divuw.S
deleted file mode 100644
index 4c9eee7..0000000
--- a/isa/rv64ui/divuw.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# divuw.S
-#-----------------------------------------------------------------------------
-#
-# Test divuw instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, divuw, 3, 20, 6 );
- TEST_RR_OP( 3, divuw, 715827879, -20 << 32 >> 32, 6 );
- TEST_RR_OP( 4, divuw, 0, 20, -6 );
- TEST_RR_OP( 5, divuw, 0, -20, -6 );
-
- TEST_RR_OP( 6, divuw, -1<<31, -1<<31, 1 );
- TEST_RR_OP( 7, divuw, 0, -1<<31, -1 );
-
- TEST_RR_OP( 8, divuw, -1, -1<<31, 0 );
- TEST_RR_OP( 9, divuw, -1, 1, 0 );
- TEST_RR_OP(10, divuw, -1, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/divw.S b/isa/rv64ui/divw.S
deleted file mode 100644
index 4cffa1a..0000000
--- a/isa/rv64ui/divw.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# divw.S
-#-----------------------------------------------------------------------------
-#
-# Test divw instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, divw, 3, 20, 6 );
- TEST_RR_OP( 3, divw, -3, -20, 6 );
- TEST_RR_OP( 4, divw, -3, 20, -6 );
- TEST_RR_OP( 5, divw, 3, -20, -6 );
-
- TEST_RR_OP( 6, divw, -1<<31, -1<<31, 1 );
- TEST_RR_OP( 7, divw, -1<<31, -1<<31, -1 );
-
- TEST_RR_OP( 8, divw, -1, -1<<31, 0 );
- TEST_RR_OP( 9, divw, -1, 1, 0 );
- TEST_RR_OP(10, divw, -1, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/lrsc.S b/isa/rv64ui/lrsc.S
deleted file mode 100644
index 9422739..0000000
--- a/isa/rv64ui/lrsc.S
+++ /dev/null
@@ -1,84 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# lrsr.S
-#-----------------------------------------------------------------------------
-#
-# Test LR/SC instructions.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
-# get a unique core id
-la a0, coreid
-li a1, 1
-amoadd.w a2, a1, (a0)
-
-# for now, only run this on core 0
-1:li a3, 1
-bgeu a2, a3, 1b
-
-1: lw a1, (a0)
-bltu a1, a3, 1b
-
-# make sure that sc without a reservation fails.
-TEST_CASE( 2, a4, 1, \
- la a0, foo; \
- sc.w a4, x0, (a0); \
-)
-
-# make sure that sc with the wrong reservation fails.
-# TODO is this actually mandatory behavior?
-TEST_CASE( 3, a4, 1, \
- la a0, foo; \
- add a1, a0, 1024; \
- lr.w a1, (a1); \
- sc.w a4, a1, (a0); \
-)
-
-# have each core add its coreid to foo 1000 times
-la a0, foo
-li a1, 1000
-1: lr.w a4, (a0)
-add a4, a4, a2
-sc.w a4, a4, (a0)
-bnez a4, 1b
-add a1, a1, -1
-bnez a1, 1b
-
-# wait for all cores to finish
-la a0, barrier
-li a1, 1
-amoadd.w x0, a1, (a0)
-1: lw a1, (a0)
-blt a1, a3, 1b
-fence
-
-# expected result is 1000*ncores*(ncores-1)/2
-TEST_CASE( 4, a2, 0, \
- la a0, foo; \
- li a1, 500; \
- mul a1, a1, a3; \
- add a2, a3, -1; \
- mul a1, a1, a2; \
- lw a2, (a0); \
- sub a2, a2, a1; \
-)
-
-TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-coreid: .word 0
-barrier: .word 0
-foo: .word 0
-RVTEST_DATA_END
diff --git a/isa/rv64ui/mul.S b/isa/rv64ui/mul.S
deleted file mode 100644
index c647e97..0000000
--- a/isa/rv64ui/mul.S
+++ /dev/null
@@ -1,78 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# mul.S
-#-----------------------------------------------------------------------------
-#
-# Test mul instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP(32, mul, 0x0000000000001200, 0x0000000000007e00, 0x6db6db6db6db6db7 );
- TEST_RR_OP(33, mul, 0x0000000000001240, 0x0000000000007fc0, 0x6db6db6db6db6db7 );
-
- TEST_RR_OP( 2, mul, 0x00000000, 0x00000000, 0x00000000 );
- TEST_RR_OP( 3, mul, 0x00000001, 0x00000001, 0x00000001 );
- TEST_RR_OP( 4, mul, 0x00000015, 0x00000003, 0x00000007 );
-
- TEST_RR_OP( 5, mul, 0x0000000000000000, 0x0000000000000000, 0xffffffffffff8000 );
- TEST_RR_OP( 6, mul, 0x0000000000000000, 0xffffffff80000000, 0x00000000 );
- TEST_RR_OP( 7, mul, 0x0000400000000000, 0xffffffff80000000, 0xffffffffffff8000 );
-
- TEST_RR_OP(30, mul, 0x000000000000ff7f, 0xaaaaaaaaaaaaaaab, 0x000000000002fe7d );
- TEST_RR_OP(31, mul, 0x000000000000ff7f, 0x000000000002fe7d, 0xaaaaaaaaaaaaaaab );
-
- #-------------------------------------------------------------
- # Source/Destination tests
- #-------------------------------------------------------------
-
- TEST_RR_SRC1_EQ_DEST( 8, mul, 143, 13, 11 );
- TEST_RR_SRC2_EQ_DEST( 9, mul, 154, 14, 11 );
- TEST_RR_SRC12_EQ_DEST( 10, mul, 169, 13 );
-
- #-------------------------------------------------------------
- # Bypassing tests
- #-------------------------------------------------------------
-
- TEST_RR_DEST_BYPASS( 11, 0, mul, 143, 13, 11 );
- TEST_RR_DEST_BYPASS( 12, 1, mul, 154, 14, 11 );
- TEST_RR_DEST_BYPASS( 13, 2, mul, 165, 15, 11 );
-
- TEST_RR_SRC12_BYPASS( 14, 0, 0, mul, 143, 13, 11 );
- TEST_RR_SRC12_BYPASS( 15, 0, 1, mul, 154, 14, 11 );
- TEST_RR_SRC12_BYPASS( 16, 0, 2, mul, 165, 15, 11 );
- TEST_RR_SRC12_BYPASS( 17, 1, 0, mul, 143, 13, 11 );
- TEST_RR_SRC12_BYPASS( 18, 1, 1, mul, 154, 14, 11 );
- TEST_RR_SRC12_BYPASS( 19, 2, 0, mul, 165, 15, 11 );
-
- TEST_RR_SRC21_BYPASS( 20, 0, 0, mul, 143, 13, 11 );
- TEST_RR_SRC21_BYPASS( 21, 0, 1, mul, 154, 14, 11 );
- TEST_RR_SRC21_BYPASS( 22, 0, 2, mul, 165, 15, 11 );
- TEST_RR_SRC21_BYPASS( 23, 1, 0, mul, 143, 13, 11 );
- TEST_RR_SRC21_BYPASS( 24, 1, 1, mul, 154, 14, 11 );
- TEST_RR_SRC21_BYPASS( 25, 2, 0, mul, 165, 15, 11 );
-
- TEST_RR_ZEROSRC1( 26, mul, 0, 31 );
- TEST_RR_ZEROSRC2( 27, mul, 0, 32 );
- TEST_RR_ZEROSRC12( 28, mul, 0 );
- TEST_RR_ZERODEST( 29, mul, 33, 34 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/mulh.S b/isa/rv64ui/mulh.S
deleted file mode 100644
index 1fd12a1..0000000
--- a/isa/rv64ui/mulh.S
+++ /dev/null
@@ -1,72 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# mulh.S
-#-----------------------------------------------------------------------------
-#
-# Test mulh instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, mulh, 0x00000000, 0x00000000, 0x00000000 );
- TEST_RR_OP( 3, mulh, 0x00000000, 0x00000001, 0x00000001 );
- TEST_RR_OP( 4, mulh, 0x00000000, 0x00000003, 0x00000007 );
-
- TEST_RR_OP( 5, mulh, 0x0000000000000000, 0x0000000000000000, 0xffffffffffff8000 );
- TEST_RR_OP( 6, mulh, 0x0000000000000000, 0xffffffff80000000, 0x00000000 );
- TEST_RR_OP( 7, mulh, 0x0000000000000000, 0xffffffff80000000, 0xffffffffffff8000 );
-
- #-------------------------------------------------------------
- # Source/Destination tests
- #-------------------------------------------------------------
-
- TEST_RR_SRC1_EQ_DEST( 8, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_SRC2_EQ_DEST( 9, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_EQ_DEST( 10, mulh, 169, 13<<32 );
-
- #-------------------------------------------------------------
- # Bypassing tests
- #-------------------------------------------------------------
-
- TEST_RR_DEST_BYPASS( 11, 0, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 12, 1, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 13, 2, mulh, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC12_BYPASS( 14, 0, 0, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 15, 0, 1, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 16, 0, 2, mulh, 165, 15<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 17, 1, 0, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 18, 1, 1, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 19, 2, 0, mulh, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC21_BYPASS( 20, 0, 0, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 21, 0, 1, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 22, 0, 2, mulh, 165, 15<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 23, 1, 0, mulh, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 24, 1, 1, mulh, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 25, 2, 0, mulh, 165, 15<<32, 11<<32 );
-
- TEST_RR_ZEROSRC1( 26, mulh, 0, 31<<32 );
- TEST_RR_ZEROSRC2( 27, mulh, 0, 32<<32 );
- TEST_RR_ZEROSRC12( 28, mulh, 0 );
- TEST_RR_ZERODEST( 29, mulh, 33<<32, 34<<32 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/mulhsu.S b/isa/rv64ui/mulhsu.S
deleted file mode 100644
index c037db2..0000000
--- a/isa/rv64ui/mulhsu.S
+++ /dev/null
@@ -1,72 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# mulhsu.S
-#-----------------------------------------------------------------------------
-#
-# Test mulhsu instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, mulhsu, 0x00000000, 0x00000000, 0x00000000 );
- TEST_RR_OP( 3, mulhsu, 0x00000000, 0x00000001, 0x00000001 );
- TEST_RR_OP( 4, mulhsu, 0x00000000, 0x00000003, 0x00000007 );
-
- TEST_RR_OP( 5, mulhsu, 0x0000000000000000, 0x0000000000000000, 0xffffffffffff8000 );
- TEST_RR_OP( 6, mulhsu, 0x0000000000000000, 0xffffffff80000000, 0x00000000 );
- TEST_RR_OP( 7, mulhsu, 0xffffffff80000000, 0xffffffff80000000, 0xffffffffffff8000 );
-
- #-------------------------------------------------------------
- # Source/Destination tests
- #-------------------------------------------------------------
-
- TEST_RR_SRC1_EQ_DEST( 8, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC2_EQ_DEST( 9, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_EQ_DEST( 10, mulhsu, 169, 13<<32 );
-
- #-------------------------------------------------------------
- # Bypassing tests
- #-------------------------------------------------------------
-
- TEST_RR_DEST_BYPASS( 11, 0, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 12, 1, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 13, 2, mulhsu, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC12_BYPASS( 14, 0, 0, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 15, 0, 1, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 16, 0, 2, mulhsu, 165, 15<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 17, 1, 0, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 18, 1, 1, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 19, 2, 0, mulhsu, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC21_BYPASS( 20, 0, 0, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 21, 0, 1, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 22, 0, 2, mulhsu, 165, 15<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 23, 1, 0, mulhsu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 24, 1, 1, mulhsu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 25, 2, 0, mulhsu, 165, 15<<32, 11<<32 );
-
- TEST_RR_ZEROSRC1( 26, mulhsu, 0, 31<<32 );
- TEST_RR_ZEROSRC2( 27, mulhsu, 0, 32<<32 );
- TEST_RR_ZEROSRC12( 28, mulhsu, 0 );
- TEST_RR_ZERODEST( 29, mulhsu, 33<<32, 34<<32 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/mulhu.S b/isa/rv64ui/mulhu.S
deleted file mode 100644
index aa7b762..0000000
--- a/isa/rv64ui/mulhu.S
+++ /dev/null
@@ -1,75 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# mulhu.S
-#-----------------------------------------------------------------------------
-#
-# Test mulhu instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, mulhu, 0x00000000, 0x00000000, 0x00000000 );
- TEST_RR_OP( 3, mulhu, 0x00000000, 0x00000001, 0x00000001 );
- TEST_RR_OP( 4, mulhu, 0x00000000, 0x00000003, 0x00000007 );
-
- TEST_RR_OP( 5, mulhu, 0x0000000000000000, 0x0000000000000000, 0xffffffffffff8000 );
- TEST_RR_OP( 6, mulhu, 0x0000000000000000, 0xffffffff80000000, 0x00000000 );
- TEST_RR_OP( 7, mulhu, 0xffffffff7fff8000, 0xffffffff80000000, 0xffffffffffff8000 );
-
- TEST_RR_OP(30, mulhu, 0x000000000001fefe, 0xaaaaaaaaaaaaaaab, 0x000000000002fe7d );
- TEST_RR_OP(31, mulhu, 0x000000000001fefe, 0x000000000002fe7d, 0xaaaaaaaaaaaaaaab );
-
- #-------------------------------------------------------------
- # Source/Destination tests
- #-------------------------------------------------------------
-
- TEST_RR_SRC1_EQ_DEST( 8, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC2_EQ_DEST( 9, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_EQ_DEST( 10, mulhu, 169, 13<<32 );
-
- #-------------------------------------------------------------
- # Bypassing tests
- #-------------------------------------------------------------
-
- TEST_RR_DEST_BYPASS( 11, 0, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 12, 1, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_DEST_BYPASS( 13, 2, mulhu, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC12_BYPASS( 14, 0, 0, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 15, 0, 1, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 16, 0, 2, mulhu, 165, 15<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 17, 1, 0, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 18, 1, 1, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC12_BYPASS( 19, 2, 0, mulhu, 165, 15<<32, 11<<32 );
-
- TEST_RR_SRC21_BYPASS( 20, 0, 0, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 21, 0, 1, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 22, 0, 2, mulhu, 165, 15<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 23, 1, 0, mulhu, 143, 13<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 24, 1, 1, mulhu, 154, 14<<32, 11<<32 );
- TEST_RR_SRC21_BYPASS( 25, 2, 0, mulhu, 165, 15<<32, 11<<32 );
-
- TEST_RR_ZEROSRC1( 26, mulhu, 0, 31<<32 );
- TEST_RR_ZEROSRC2( 27, mulhu, 0, 32<<32 );
- TEST_RR_ZEROSRC12( 28, mulhu, 0 );
- TEST_RR_ZERODEST( 29, mulhu, 33<<32, 34<<32 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/mulw.S b/isa/rv64ui/mulw.S
deleted file mode 100644
index 379c3f2..0000000
--- a/isa/rv64ui/mulw.S
+++ /dev/null
@@ -1,72 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# mulw.S
-#-----------------------------------------------------------------------------
-#
-# Test mulw instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, mulw, 0x00000000, 0x00000000, 0x00000000 );
- TEST_RR_OP( 3, mulw, 0x00000001, 0x00000001, 0x00000001 );
- TEST_RR_OP( 4, mulw, 0x00000015, 0x00000003, 0x00000007 );
-
- TEST_RR_OP( 5, mulw, 0x0000000000000000, 0x0000000000000000, 0xffffffffffff8000 );
- TEST_RR_OP( 6, mulw, 0x0000000000000000, 0xffffffff80000000, 0x00000000 );
- TEST_RR_OP( 7, mulw, 0x0000000000000000, 0xffffffff80000000, 0xffffffffffff8000 );
-
- #-------------------------------------------------------------
- # Source/Destination tests
- #-------------------------------------------------------------
-
- TEST_RR_SRC1_EQ_DEST( 8, mulw, 143, 13, 11 );
- TEST_RR_SRC2_EQ_DEST( 9, mulw, 154, 14, 11 );
- TEST_RR_SRC12_EQ_DEST( 10, mulw, 169, 13 );
-
- #-------------------------------------------------------------
- # Bypassing tests
- #-------------------------------------------------------------
-
- TEST_RR_DEST_BYPASS( 11, 0, mulw, 143, 13, 11 );
- TEST_RR_DEST_BYPASS( 12, 1, mulw, 154, 14, 11 );
- TEST_RR_DEST_BYPASS( 13, 2, mulw, 165, 15, 11 );
-
- TEST_RR_SRC12_BYPASS( 14, 0, 0, mulw, 143, 13, 11 );
- TEST_RR_SRC12_BYPASS( 15, 0, 1, mulw, 154, 14, 11 );
- TEST_RR_SRC12_BYPASS( 16, 0, 2, mulw, 165, 15, 11 );
- TEST_RR_SRC12_BYPASS( 17, 1, 0, mulw, 143, 13, 11 );
- TEST_RR_SRC12_BYPASS( 18, 1, 1, mulw, 154, 14, 11 );
- TEST_RR_SRC12_BYPASS( 19, 2, 0, mulw, 165, 15, 11 );
-
- TEST_RR_SRC21_BYPASS( 20, 0, 0, mulw, 143, 13, 11 );
- TEST_RR_SRC21_BYPASS( 21, 0, 1, mulw, 154, 14, 11 );
- TEST_RR_SRC21_BYPASS( 22, 0, 2, mulw, 165, 15, 11 );
- TEST_RR_SRC21_BYPASS( 23, 1, 0, mulw, 143, 13, 11 );
- TEST_RR_SRC21_BYPASS( 24, 1, 1, mulw, 154, 14, 11 );
- TEST_RR_SRC21_BYPASS( 25, 2, 0, mulw, 165, 15, 11 );
-
- TEST_RR_ZEROSRC1( 26, mulw, 0, 31 );
- TEST_RR_ZEROSRC2( 27, mulw, 0, 32 );
- TEST_RR_ZEROSRC12( 28, mulw, 0 );
- TEST_RR_ZERODEST( 29, mulw, 33, 34 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/rem.S b/isa/rv64ui/rem.S
deleted file mode 100644
index e3248ff..0000000
--- a/isa/rv64ui/rem.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# rem.S
-#-----------------------------------------------------------------------------
-#
-# Test rem instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, rem, 2, 20, 6 );
- TEST_RR_OP( 3, rem, -2, -20, 6 );
- TEST_RR_OP( 4, rem, 2, 20, -6 );
- TEST_RR_OP( 5, rem, -2, -20, -6 );
-
- TEST_RR_OP( 6, rem, 0, -1<<63, 1 );
- TEST_RR_OP( 7, rem, 0, -1<<63, -1 );
-
- TEST_RR_OP( 8, rem, -1<<63, -1<<63, 0 );
- TEST_RR_OP( 9, rem, 1, 1, 0 );
- TEST_RR_OP(10, rem, 0, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/remu.S b/isa/rv64ui/remu.S
deleted file mode 100644
index 6946d0d..0000000
--- a/isa/rv64ui/remu.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# remu.S
-#-----------------------------------------------------------------------------
-#
-# Test remu instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, remu, 2, 20, 6 );
- TEST_RR_OP( 3, remu, 2, -20, 6 );
- TEST_RR_OP( 4, remu, 20, 20, -6 );
- TEST_RR_OP( 5, remu, -20, -20, -6 );
-
- TEST_RR_OP( 6, remu, 0, -1<<63, 1 );
- TEST_RR_OP( 7, remu, -1<<63, -1<<63, -1 );
-
- TEST_RR_OP( 8, remu, -1<<63, -1<<63, 0 );
- TEST_RR_OP( 9, remu, 1, 1, 0 );
- TEST_RR_OP(10, remu, 0, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/remuw.S b/isa/rv64ui/remuw.S
deleted file mode 100644
index 334b5c5..0000000
--- a/isa/rv64ui/remuw.S
+++ /dev/null
@@ -1,41 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# remuw.S
-#-----------------------------------------------------------------------------
-#
-# Test remuw instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, remuw, 2, 20, 6 );
- TEST_RR_OP( 3, remuw, 2, -20, 6 );
- TEST_RR_OP( 4, remuw, 20, 20, -6 );
- TEST_RR_OP( 5, remuw, -20, -20, -6 );
-
- TEST_RR_OP( 6, remuw, 0, -1<<31, 1 );
- TEST_RR_OP( 7, remuw, -1<<31, -1<<31, -1 );
-
- TEST_RR_OP( 8, remuw, -1<<31, -1<<31, 0 );
- TEST_RR_OP( 9, remuw, 1, 1, 0 );
- TEST_RR_OP(10, remuw, 0, 0, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END
diff --git a/isa/rv64ui/remw.S b/isa/rv64ui/remw.S
deleted file mode 100644
index 3ae8e3d..0000000
--- a/isa/rv64ui/remw.S
+++ /dev/null
@@ -1,42 +0,0 @@
-# See LICENSE for license details.
-
-#*****************************************************************************
-# remw.S
-#-----------------------------------------------------------------------------
-#
-# Test remw instruction.
-#
-
-#include "riscv_test.h"
-#include "test_macros.h"
-
-RVTEST_RV64U
-RVTEST_CODE_BEGIN
-
- #-------------------------------------------------------------
- # Arithmetic tests
- #-------------------------------------------------------------
-
- TEST_RR_OP( 2, remw, 2, 20, 6 );
- TEST_RR_OP( 3, remw, -2, -20, 6 );
- TEST_RR_OP( 4, remw, 2, 20, -6 );
- TEST_RR_OP( 5, remw, -2, -20, -6 );
-
- TEST_RR_OP( 6, remw, 0, -1<<31, 1 );
- TEST_RR_OP( 7, remw, 0, -1<<31, -1 );
-
- TEST_RR_OP( 8, remw, -1<<31, -1<<31, 0 );
- TEST_RR_OP( 9, remw, 1, 1, 0 );
- TEST_RR_OP(10, remw, 0, 0, 0 );
- TEST_RR_OP(11, remw, 0xfffffffffffff897,0xfffffffffffff897, 0 );
-
- TEST_PASSFAIL
-
-RVTEST_CODE_END
-
- .data
-RVTEST_DATA_BEGIN
-
- TEST_DATA
-
-RVTEST_DATA_END