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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-17 01:18:36 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-17 01:18:36 -0700 |
| commit | 211d78276b07b17f831cefaf79961d3e6dad3c90 (patch) | |
| tree | f640b72bdf446e7f78eb9cae97ee99c80e54dbf1 /isa/rv64si/dirty.S | |
| parent | dd0d4036430dc812c9168fad8870d58ce151f498 (diff) | |
| download | riscv-tests-211d78276b07b17f831cefaf79961d3e6dad3c90.zip riscv-tests-211d78276b07b17f831cefaf79961d3e6dad3c90.tar.gz riscv-tests-211d78276b07b17f831cefaf79961d3e6dad3c90.tar.bz2 | |
Merge [shm]call into ecall, [shm]ret into eret
Diffstat (limited to 'isa/rv64si/dirty.S')
| -rw-r--r-- | isa/rv64si/dirty.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/isa/rv64si/dirty.S b/isa/rv64si/dirty.S index 87a619a..78e333b 100644 --- a/isa/rv64si/dirty.S +++ b/isa/rv64si/dirty.S @@ -23,7 +23,7 @@ RVTEST_CODE_BEGIN csrs mstatus, a1 la a1, 1f csrw mepc, a1 - mret + eret 1: # Try a faulting store to make sure dirty bit is not set |