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author | Roger Chang <rogerycchang@google.com> | 2024-02-19 11:35:22 +0800 |
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committer | Roger Chang <rogerycchang@google.com> | 2024-02-19 11:35:22 +0800 |
commit | 9c06101326cdd451a051bc3e6469b3c76f24d101 (patch) | |
tree | 1a5653d944c240bb81dbfa4c37e922186af35215 /isa/rv32uzbs/bexti.S | |
parent | 879cb3ccf7672f537cefece890c85e8cc913c0ea (diff) | |
download | riscv-tests-9c06101326cdd451a051bc3e6469b3c76f24d101.zip riscv-tests-9c06101326cdd451a051bc3e6469b3c76f24d101.tar.gz riscv-tests-9c06101326cdd451a051bc3e6469b3c76f24d101.tar.bz2 |
Add zbs test cases
Signed-off-by: Roger Chang <rogerycchang@google.com>
Diffstat (limited to 'isa/rv32uzbs/bexti.S')
-rw-r--r-- | isa/rv32uzbs/bexti.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/isa/rv32uzbs/bexti.S b/isa/rv32uzbs/bexti.S new file mode 100644 index 0000000..91ee2d6 --- /dev/null +++ b/isa/rv32uzbs/bexti.S @@ -0,0 +1,7 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64U +#define RVTEST_RV64U RVTEST_RV32U + +#include "../rv64uzbs/bexti.S" |