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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2015-03-25 16:25:42 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2015-03-25 16:25:42 -0700 |
| commit | 9e4b081d4a219c4eea1a7e979c316a0ff1cd7cdc (patch) | |
| tree | 7e1db6f26a9d315cf164154a43623a33daf835a6 /isa/rv32mi | |
| parent | a398a9baeccebbf7b8c7bd04edaac5e0d02cd7bf (diff) | |
| download | riscv-tests-9e4b081d4a219c4eea1a7e979c316a0ff1cd7cdc.zip riscv-tests-9e4b081d4a219c4eea1a7e979c316a0ff1cd7cdc.tar.gz riscv-tests-9e4b081d4a219c4eea1a7e979c316a0ff1cd7cdc.tar.bz2 | |
split out S-mode tests and M-mode tests
Diffstat (limited to 'isa/rv32mi')
| -rw-r--r-- | isa/rv32mi/Makefrag | 18 | ||||
| -rw-r--r-- | isa/rv32mi/csr.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/illegal.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/ipi.S | 7 | ||||
| -rw-r--r-- | isa/rv32mi/ma_addr.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/ma_fetch.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/sbreak.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/scall.S | 8 | ||||
| -rw-r--r-- | isa/rv32mi/timer.S | 8 |
9 files changed, 81 insertions, 0 deletions
diff --git a/isa/rv32mi/Makefrag b/isa/rv32mi/Makefrag new file mode 100644 index 0000000..e6ab8c8 --- /dev/null +++ b/isa/rv32mi/Makefrag @@ -0,0 +1,18 @@ +#======================================================================= +# Makefrag for rv32mi tests +#----------------------------------------------------------------------- + +rv32mi_sc_tests = \ + csr \ + illegal \ + ma_fetch \ + ma_addr \ + scall \ + sbreak \ + timer \ + +rv32mi_mc_tests = \ + ipi \ + +rv32mi_p_tests = $(addprefix rv32mi-p-, $(rv32mi_sc_tests)) +rv32mi_pm_tests = $(addprefix rv32mi-pm-, $(rv32mi_mc_tests)) diff --git a/isa/rv32mi/csr.S b/isa/rv32mi/csr.S new file mode 100644 index 0000000..6361f86 --- /dev/null +++ b/isa/rv32mi/csr.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/csr.S" diff --git a/isa/rv32mi/illegal.S b/isa/rv32mi/illegal.S new file mode 100644 index 0000000..c357ed7 --- /dev/null +++ b/isa/rv32mi/illegal.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/illegal.S" diff --git a/isa/rv32mi/ipi.S b/isa/rv32mi/ipi.S new file mode 100644 index 0000000..c39fc29 --- /dev/null +++ b/isa/rv32mi/ipi.S @@ -0,0 +1,7 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64M +#define RVTEST_RV64M RVTEST_RV32M + +#include "../rv64mi/ipi.S" diff --git a/isa/rv32mi/ma_addr.S b/isa/rv32mi/ma_addr.S new file mode 100644 index 0000000..df5099a --- /dev/null +++ b/isa/rv32mi/ma_addr.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/ma_addr.S" diff --git a/isa/rv32mi/ma_fetch.S b/isa/rv32mi/ma_fetch.S new file mode 100644 index 0000000..ec0e0f6 --- /dev/null +++ b/isa/rv32mi/ma_fetch.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/ma_fetch.S" diff --git a/isa/rv32mi/sbreak.S b/isa/rv32mi/sbreak.S new file mode 100644 index 0000000..c1b127d --- /dev/null +++ b/isa/rv32mi/sbreak.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/sbreak.S" diff --git a/isa/rv32mi/scall.S b/isa/rv32mi/scall.S new file mode 100644 index 0000000..e5b3153 --- /dev/null +++ b/isa/rv32mi/scall.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/scall.S" diff --git a/isa/rv32mi/timer.S b/isa/rv32mi/timer.S new file mode 100644 index 0000000..58dac99 --- /dev/null +++ b/isa/rv32mi/timer.S @@ -0,0 +1,8 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64S +#define RVTEST_RV64S RVTEST_RV32M +#define __MACHINE_MODE + +#include "../rv64si/timer.S" |